128 KByte Flash Module (S12XFTMR128K1V1)
MC9S12XHY-Family Reference Manual, Rev. 1.01
622
Freescale Semiconductor
19.2.1
Module Memory Map
The S12X architecture places the P-Flash memory between global addresses . The P-Flash memory map
is shown in .
The FPROT register, described in
Section 19.2.1.9
, can be set to protect regions in the Flash memory from
accidental program or erase. Three separate memory regions, one growing upward from global address
0x7F_8000 in the Flash memory (called the lower region), one growing downward from global address
0x7F_FFFF in the Flash memory (called the higher region), and the remaining addresses in the Flash
memory, can be activated for protection. The Flash memory addresses covered by these protectable regions
are shown in the P-Flash memory map. The higher address region is mainly targeted to hold the boot loader
code since it covers the vector space. Default protection settings as well as security information that allows
the MCU to restrict access to the Flash module are stored in the Flash configuration field as described in
Table 19-1
.
Table 19-1. Flash Configuration Field
1
1
Older versions may have swapped protection byte addresses
Global Address
Size
(Bytes)
Description
0x7F_FF00 – 0x7F_FF07
8
Backdoor Comparison Key
Refer to
Section 19.3.2.11, “Verify Backdoor Access Key Command
,” and
Section 19.4.1, “Unsecuring the MCU using Backdoor Key Access
”
0x7F_FF08 – 0x7F_FF0B
2
2
0x7FF08 - 0x7F_FF0F form a Flash phrase and must be programmed in a single command write sequence. Each byte in
the 0x7F_FF08 - 0x7F_FF0B reserved field should be programmed to 0xFF.
4
Reserved
0x7F_FF0C
2
1
P-Flash Protection byte
.
Refer to
Section 19.2.1.9, “P-Flash Protection Register (FPROT)”
0x7F_FF0D
2
1
D-Flash Protection byte
.
Refer to
Section 19.2.1.10, “D-Flash Protection Register (DFPROT)”
0x7F_FF0E
2
1
Flash Nonvolatile byte
Refer to
Section 19.2.1.15, “Flash Option Register (FOPT)”
0x7F_FF0F
2
1
Flash Security byte
Refer to
Section 19.2.1.2, “Flash Security Register (FSEC)”
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