128 KByte Flash Module (S12XFTMR128K1V1)
MC9S12XHY-Family Reference Manual, Rev. 1.01
644
Freescale Semiconductor
During the reset sequence, the FOPT register is loaded from the Flash nonvolatile byte in the Flash
configuration field at global address 0x7F_FF0E located in P-Flash memory (see
Table 19-1
) as indicated
by reset condition F in
Figure 19-19
. If a double bit fault is detected while reading the P-Flash phrase
containing the Flash nonvolatile byte during the reset sequence, all bits in the FOPT register will be set.
19.2.1.16 Flash Reserved2 Register (FRSV2)
This Flash register is reserved for factory testing.
All bits in the FRSV2 register read 0 and are not writable.
19.2.1.17 Flash Reserved3 Register (FRSV3)
This Flash register is reserved for factory testing.
All bits in the FRSV3 register read 0 and are not writable.
19.2.1.18 Flash Reserved4 Register (FRSV4)
This Flash register is reserved for factory testing.
Table 19-24. FOPT Field Descriptions
Field
Description
7–0
NV[7:0]
Nonvolatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the device user guide for proper
use of the NV bits.
Offset Module Base + 0x0011
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 19-20. Flash Reserved2 Register (FRSV2)
Offset Module Base + 0x0012
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 19-21. Flash Reserved3 Register (FRSV3)
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