Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
67
2.1.2
Features
The Port Integration Module includes these distinctive registers:
•
Data registers and data direction registers for Ports A, B, H, T, S, P, R, M,U, V and AD when used
as general purpose I/O
•
Control registers to enable/disable pull devices and select pull-ups/pull-downs on Ports H, T, S, P,
R,M, U and V on per-pin basis
•
Control registers to enable/disable pull-up devices on Port AD on per-pin basis
•
Single control register to enable/disable pull-down on Ports A and B, on per-port basis and
•
Single control register to enable/disable pull-up on BKGD pin
•
Control registers to enable/disable open-drain (wired-or) mode on Ports H, R,M and S.Control
register to enable/disable slew rate control on Port U and Port V
•
Interrupt flag register for pin interrupts on Ports R, Port S, Port T and AD
•
Control register to configure IRQ/XIRQ pin operation
•
Routing register to support module port relocation
•
Free-running clock outputs
A standard port pin has the following minimum features:
•
Input/output selection
•
5V output drive 5V digital and analog input
•
Input with selectable pull-up or pull-down device
Optional features supported on dedicated pins:
•
Open drain for wired-or connections
•
Interrupt inputs with glitch filtering
•
The output slew rate control
2.2
External Signal Description
This section lists and describes the signals that do connect off-chip.
Table 2-1
shows all the pins and their functions that are controlled by the Port Integration Module.
NOTE
If there is more than one function associated with a pin, the priority is
indicated by the position in the table from top (highest priority) to bottom
(lowest priority).
Table 2-1. Pin Functions and Priorities
Port
Pin Name
Pin Function
& Priority
1
I/O
Description
Pin Function
after Reset
-
BKGD
MODC
2
I
MODC input during RESET
BKGD
BKGD
I/O BDM communication pin
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