Stepper Stall Detector (SSDV1) Block Description
MC9S12XHY-Family Reference Manual, Rev. 1.01
702
Freescale Semiconductor
21.3
Memory Map and Register Definition
This section provides a detailed description of all registers of the stepper stall detector (SSD) block.
21.3.1
Module Memory Map
Table 21-2
gives an overview of all registers in the SSDV1 memory map. The SSDV1 occupies eight bytes
in the memory space. The register address results from the addition of
base address
and
address offset.
The
base address
is determined at the MCU level and is given in the Device Overview chapter. The
address
offset
is defined at the block level and is given here.
21.3.2
Register Descriptions
This section describes in detail all the registers and register bits in the SSDV1 block. Each description
includes a standard register diagram with an associated figure number. Details of register bit and field
function follow the register diagrams, in bit order.
Table 21-2. SSDV1 Memory Map
Address
Offset
Use
Access
0x0000
RTZCTL
R/W
0x0001
MDCCTL
R/W
0x0002
SSDCTL
R/W
0x0003
SSDFLG
R/W
0x0004
MDCCNT (High)
R/W
0x0005
MDCCNT (Low)
R/W
0x0006
ITGACC (High)
R
0x0007
ITGACC (Low)
R
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