Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.01
92
Freescale Semiconductor
2.3.12
IRQ Control Register (IRQCR)
2.3.13
PIM Reserved Register
This register is reserved for factory testing of the PIM module and is not available in normal operation.
1
Read: Always reads 0x00
Write: Unimplemented
Address 0x001E
Access: User read/write
1
1
Read: See individual bit descriptions below.
Write: See individual bit descriptions below.
7
6
5
4
3
2
1
0
R
IRQE
IRQEN
XIRQEN
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-10. IRQ Control Register (IRQCR)
Table 2-10. IRQCR Register Field Descriptions
Field
Description
7
IRQE
IRQ select edge sensitive only—
Special mode: Read or write anytime.
Normal mode: Read anytime, write once.
1 IRQ pin configured to respond only to falling edges. Falling edges on the IRQ pin will be detected anytime IRQE=1
and will be cleared only upon a reset or the servicing of the IRQ interrupt.
0 IRQ pin configured for low level recognition
6
IRQEN
IRQ enable—
Read or write anytime.
1 IRQ pin is connected to interrupt logic
0 IRQ pin is disconnected from interrupt logic
5
XIRQEN
XIRQ enable—
Special mode: Read or write anytime.
Normal mode: Read anytime, write once.
1 XIRQ pin is connected to interrupt logic
0 XIRQ pin is disconnected from interrupt logic
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