Chapter 23 LIN Physical Layer (S12LINPHYV2)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
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Freescale Semiconductor
23.2
External Signal Description
This section lists and describes the signals that connect off chip as well as internal supply nodes and special
signals.
23.2.1
LIN — LIN Bus Pin
This pad is connected to the single-wire LIN data bus.
23.2.2
LGND — LIN Ground Pin
This pin is the device LIN ground connection. It is used to sink currents related to the LIN Bus pin. A de-
coupling capacitor external to the device (typically 220 pF, X7R ceramic) between LIN and LGND can
further improve the quality of this ground and filter noise.
23.2.3
VLINSUP — Positive Power Supply
External power supply to the chip. The VLINSUP supply mapping is described in device level
documentation.
23.2.4
LPTxD — LIN Transmit Pin
This pin can be routed to the SCI, LPDR1 register bit, an external pin, or other options. Please refer to the
PIM chapter of the device specification for the available routing options.
This input is only used in normal mode; in other modes the value of this pin is ignored.
23.2.5
LPRxD — LIN Receive Pin
This pin can be routed to the SCI, an external pin, or other options. Please refer to the PIM chapter of the
device specification for the available routing options.
In standby mode this output is disabled, and sends only a short pulse in case the wake-up functionality is
enabled and a valid wake-up pulse was received in the LIN Bus.
