Chapter 20 ECC Generation module (SRAM_ECCV1)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
684
Freescale Semiconductor
20.3.6
ECC Algorithm
The table below shows the equation for each ECC bit based on the 16 bit data word.
Table 20-11. ECC Calculation
20.3.7
ECC Debug Behavior
For debug purpose it is possible to read and write the uncorrected use data and the raw ECC value direct
from the memory. For these debug accesses a register interface is available. The debug access is performed
with the lowest priority, other memory accesses must be done before the debug access starts. If a debug
access is requested during a ongoing memory initialization process then the debug access is performed if
the memory initialization process is done.
If the ECCDRR bit is set then the automatic single bit ECC error repair function for all read accesses is
disabled. In this case a read access from a system memory location with single bit ECC error will produce
correct data and the single bit ECC error is flagged by the SBEEIF, but the data inside the system memory
are unchanged.
By writing wrong ECC values into the system memory the debug access can be used to force single and
double bit ECC errors to check the SW error handling.
It is not possible to set the ECCDW or ECCDR bit if the previous debug access is ongoing. (ECCDW or
ECCDR bit active) This makes sure that the ECCDD and ECCDE registers contains consistent data. The
SW should read out the status of the ECCDW and ECCDR register bit before a new debug access is
requested.
20.3.7.1
ECC Debug Memory Write Access
Writing one to the ECCDW bit performs a debug write access to the memory address defined by register
DPTR. During this access, the raw data DDATA and the ECC value DECC are written direct into the
system memory. If the debug write access is done the ECCDW register bit is cleared. The debug write
Table 20-10. SRAM_ECC Interrupt Sources
Module Interrupt Sources
Local Enable
Single bit ECC error
ECCIE[SBEEIE]
ECC bit
Use data
ECC[0]
~ ( ^ ( data[15:0] & 0x443F ) )
ECC[1]
~ ( ^ ( data[15:0] & 0x13C7 ) )
ECC[2]
~ ( ^ ( data[15:0] & 0xE1D1 ) )
ECC[3]
~ ( ^ ( data[15:0] & 0xEE60 ) )
ECC[4]
~ ( ^ ( data[15:0] & 0x3E8A ) )
ECC[5]
~ ( ^ ( data[15:0] & 0x993C ) )
