ColdFire Flash Module (CFM)
MCF52110 ColdFire® Integrated Microcontroller Reference Manual, Rev. 1
17-8
Freescale Semiconductor
Preliminary
17.3.3.2
CFMCLKD — CFM Clock Divider Register
The CFMCLKD register is used to control the period of the clock used for timed events in program and
erase algorithms.
8
AEIE
Access Error Interrupt Enable
The AEIE bit is always readable and writable. The AEIE bit enables an interrupt in case the access error
flag, ACCERR in the CFMUSTAT register, is set.
1 = An interrupt is requested when the ACCERR flag is set.
0 = ACCERR interrupt disabled.
7
CBEIE
Command Buffer Empty Interrupt Enable
The CBEIE bit is always readable and writable. The CBEIE bit enables an interrupt in case the command
buffer empty flag, CBEIF in the CFMUSTAT register, is set.
1 = An interrupt is requested when the CBEIF flag is set.
0 = CBEIF interrupt disabled.
6
CCIE
Command Complete Interrupt Enable
The CCIE bit is always readable and writable. The CCIE bit enables an interrupt in case the command
completion flag, CCIF in the CFMUSTAT register, is set.
1 = An interrupt is requested when the CCIF flag is set.
0 = CCIF interrupt disabled.
5
KEYACC
Enable Security Key Writing
The KEYACC bit is readable and only writable if the KEYEN bits in the CFMSEC register are set to enable
backdoor key access.
1 = Writes to CFM flash memory are interpreted as keys to release security.
0 = Writes to CFM flash memory are interpreted as the start of a command write sequence.
4-0-
Reserved, read as 0
IPSBAR
Offset:
0x1D_0002 (CFMCLKD)
Access: User read/write
7
6
5
4
3
2
1
0
R
DIVLD
PRDIV8
DIV
W
Reset:
0
0
0
0
0
0
0
0
Figure 17-5. CFM Clock Divider Register (CFMCLKD)
Table 17-4. CFMMCR Field Descriptions (continued)
Field
Description
