ColdFire Core
MCF52110 ColdFire® Integrated Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
3-3
Preliminary
The supervisor-programming model is intended to be used only by system control software to implement
restricted operating system functions, I/O control, and memory management. All accesses that affect the
control features of ColdFire processors are in the supervisor programming model, which consists of
registers available in user mode as well as the following control registers:
•
16-bit status register (SR)
•
32-bit supervisor stack pointer (SSP)
•
32-bit vector base register (VBR)
Table 3-1. ColdFire Core Programming Model
BDM
Register
Width
(bits)
Access
Reset Value
Written with
MOVEC
Section/Page
Supervisor/User Access Registers
Load: 0x080
Store: 0x180
Data Register 0 (D0)
32
R/W
0xCF20_C089
No
Load: 0x081
Store: 0x181
Data Register 1 (D1)
32
R/W
0x10A0_1070
No
Load: 0x082–7
Store: 0x182–7
Data Register 2–7 (D2–D7)
32
R/W
Undefined
No
Load: 0x088–8E
Store: 0x188–8E
Address Register 0–6 (A0–A6)
32
R/W
Undefined
No
Load: 0x08F
Store: 0x18F
Supervisor/User A7 Stack Pointer (A7)
32
R/W
Undefined
No
0x804
MAC Status Register (MACSR)
8
R/W
0x00
No
0x805
MAC Address Mask Register (MASK)
16
R/W
0xFFFF
No
0x806
MAC Accumulator (ACC)
32
R/W
Undefined
No
0x80E
Condition Code Register (CCR)
8
R/W
Undefined
No
0x80F
Program Counter (PC)
32
R/W
Contents of
location
0x0000_0004
No
Supervisor Access Only Registers
0x800
User/Supervisor A7 Stack Pointer
(OTHER_A7)
32
R/W
Contents of
location
0x0000_0000
No
0x801
Vector Base Register (VBR)
32
R/W
0x0000_0000
Yes
0x80E
Status Register (SR)
16
R/W
0x27--
No
0xC04
Flash Base Address Register
(FLASHBAR)
32
R/W
0x0000_0000
Yes
•
Two 32-bit memory base address registers (RAMBAR, FLASHBAR)
