MCF52110 ColdFire® Integrated Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
4-1
Preliminary
Chapter 4
Multiply-Accumulate Unit (MAC)
4.1
Introduction
This chapter describes the functionality, microarchitecture, and performance of the multiply-accumulate
(MAC) unit in the ColdFire family of processors.
4.1.1
Overview
The MAC design provides a set of DSP operations that can improve the performance of embedded code
while supporting the integer multiply instructions of baseline ColdFire architecture.
The MAC provides functionality in three related areas:
1. Signed and unsigned integer multiplication
2. Multiply-accumulate operations supporting signed and unsigned integer operands as well as
signed, fixed-point, fractional operands
3. Miscellaneous register operations
The MAC features a three-stage execution pipeline optimized for 16-bit operands, with a 16x16 multiply
array and a single 32-bit accumulator.
The three areas of functionality are addressed in detail in following sections. The logic required to support
this functionality is contained in a MAC module (
).
Figure 4-1. Multiply-Accumulate Functionality Diagram
4.1.1.1
Introduction to the MAC
The MAC is an extension of the basic multiplier in most microprocessors. It is typically implemented in
hardware within an architecture and supports rapid execution of signal processing algorithms in fewer
X
+/-
Operand Y
Operand X
Shift 0,1,-1
Accumulator(s)
