Reset Controller Module
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
10-2
Figure 10-1. Reset Controller Block Diagram
10.4
Signals
provides a summary of the reset controller signal properties. The signals are described in the
following sections.
10.4.1
RSTI
Asserting the external RSTI for at least four rising CLKOUT edges causes the external reset request to be
recognized and latched.
10.4.2
RSTO
This active-low output signal is driven low when the internal reset controller module resets the chip. When
RSTO is active, the user can drive override options on the data bus.
10.5
Memory Map and Registers
The reset controller programming model consists of these registers:
•
Reset control register (RCR)—selects reset controller functions
•
Reset status register (RSR)—reflects the state of the last reset source
Table 10-1. Reset Controller Signal Properties
Name
Direction
Input
Hysteresis
Input
Synchronization
RSTI
I
Yes
Yes
1
1
RSTI is always synchronized except when in low-power stop mode.
RSTO
O
—
—
Power-On
Reset
PLL
Loss of Clock
PLL
Loss of Lock
Software
Reset
LVD
Detect
RSTI
Pin
Reset
Controller
RSTO
Pin
To Internal Resets
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
