UART Modules
Freescale Semiconductor
26-29
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
26.5.2
UART Module Initialization Sequence
The following shows the UART module initialization sequence.
1. UCR
n
:
a) Reset the receiver and transmitter.
b) Reset the mode pointer (MISC[2–0] = 0b001).
2. UIMR
n
: Enable the desired interrupt sources.
3. UACR
n
: Initialize the input enable control (IEC bit).
4. UCSR
n
: Select the receiver and transmitter clock. Use timer as source if required.
5. UMR1
n
:
a) If preferred, program operation of receiver ready-to-send (RXRTS bit).
a) Select receiver-ready or FIFO-full notification (RXRDY/FFULL bit).
b) Select character or block error mode (ERR bit).
c) Select parity mode and type (PM and PT bits).
d) Select number of bits per character (B/Cx bits).
6. UMR2
n
:
a) Select the mode of operation (CM bits).
b) If preferred, program operation of transmitter ready-to-send (TXRTS).
c) If preferred, program operation of clear-to-send (TXCTS bit).
d) Select stop-bit length (SB bits).
7. UCR
n
: Enable transmitter and/or receiver.
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
