Pulse-Width Modulation (PWM) Module
29-19
Freescale Semiconductor
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
Figure 29-17. PWM Left-Aligned Output Example Waveform
29.3.2.6
Center-Aligned Outputs
For center-aligned output mode selection, set the PWMCAE[CAE
n
] bit and the corresponding PWM
output is center-aligned.
The 8-bit counter operates as an up/down counter in this mode and is set to up when the counter is equal
to 0x00. The counter compares to two registers, a duty register and a period register, as shown in the block
diagram in
. When the PWM counter matches the duty register, the output flip-flop changes
state, causing the PWM waveform to also change state. A match between the PWM counter and the period
register changes the counter direction from an up-count to a down-count. When the PWM counter
decrements and matches the duty register again, the output flip-flop changes state causing the PWM output
to also change state. When the PWM counter decrements and reaches zero, the counter direction changes
from a down-count back to an up-count, and a load from the double buffer period and duty registers to the
associated registers is performed as described in
. The counter counts from 0 up to the value
in the period register and then back down to 0. Thus the effective period is PWMPER
n
×
2.
Changing the PWM output mode from left-aligned output to center-aligned output (or vice versa) while
channels are operating can cause irregularities in the PWM output. It is recommended to program the
output mode before enabling the PWM channel.
Figure 29-18. PWM Center-Aligned Output Waveform
To calculate the output frequency in center-aligned output mode for a particular channel, take the selected
clock source frequency for the channel (A, B, SA, or SB) and divide it by twice the value in the period
register for that channel.
Eqn. 29-9
The PWM
n
duty cycle (high time as a percentage of period) is expressed as:
PERIOD = 100ns
DUTY CYCLE = 75%
E = 25ns
PPOLn = 0
PPOLn = 1
Period = PWMPERn
×
2
PWMDTYn
PWMPERn
PWMPERn
PWMDTYn
PWM
n
frequency
Clock (A, B, SA, or SB)
2
P
×
WMPER
n
----------------------------------------------------------
=
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
