Revision History
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
B-6
B.5
Changes between Rev. 1 and Rev. 2
Section 18.5.4.5 / Page 18-25 • Added missing ECR register figure.
• Corrected cross-reference in the note of Table 18-16.
Section 18.5.4.23 / Page
18-41
Corrected IPSBAR offset of EMRBR (was 0x11B8, is 0x1188).
Chapter 19
• Reorganized information throughout entire chapter.
• Updated register addresses to include proper IPSBAR offsets.
• Converted register field descriptions to SRS format.
• Corrected register mnemonics as necessary to ensure consistent register naming.
• Numerous grammar and stylistic corrections.
Table 20-4 / Page 20-8
Deleted erroneous reference to nonexistent AT bit.
Chapter 22
Deleted erroneous references to nonexistent PIT2 and PIT3 modules.
Section 23.6.13 / Page 23-12 Deleted reference to nonexistent CF bits in the figure and bit descriptions for the GPTFLG2
register.
Chapter 24
Updated register figures and tables to include correct register addresses.
Chapter 25
Added missing equations in Section 25.4.
Chapter 27
Updated register figures and tables to include correct register addresses.
Table 30-1 / Page 30-5
Corrected RXGMASK address (was 0xC_0010, is 0x1C_0010).
Section 30.3.1/ Page 30-6
Added missing illustration of BIts 15:0 in the CANMCR figure and updated field description table
accordingly.
Section 30.3.7 / Page 30-15 Added missing IMASK register figure and updated field description table accordingly.
Section 30.3.8 / Page 30-15 Added missing IFLAG register figure and updated field description table accordingly.
Figure 30-9 / Page 30-13
Corrected register mnemonic (was CANCTRL, is ERRSTAT).
Appendix A
• Added GSWIACK register.
• Removed trailing R from the names of the global level m IACK registers.
• Updated PDSR register names (PDSR0 at 0x10_007C, PDSR1 at
0x10_007A).
• Added FEC registers.
• Renamed GPIO port pin data/set data registers using the new naming convention (see entry
for Chapter 14).
Table 5. MCF52235RM Rev. 1 to Rev. 2 Changes
Location in Rev. 1
Description
Throughout
Language, punctuation, and layout improvements.
Title page
Added “This product incorporates SuperFlash
®
technology licensed from SST” statement.
Chapter 1
• Corrected missing and incomplete sentences.
• Updated block diagram to include correct peripheral signal names.
• Revised package information.
Section 1.4.3 / Page 1-10
Corrected second sentence to read “... a 256-bit boundary-scan register...”.
Table 4. MCF52235RM Rev. 2 to Rev. 3 Changes (continued)
Location in Rev. 2
Description
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
