ColdFire Flash Module (CFM)
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
17-5
NOTE
The flash is marked as valid on reset based on the RCON (reset
configuration) pin state. Flash space is valid on reset when booting in single
chip mode (RCON pin asserted and D[26]/D[17]/D[16] set to 110), or when
booting internally in master mode (RCON asserted and D[26]/D[17]/D[16]
are set to 111 and D[18] and D[19] are set to 00). See
” for more details. When the default reset
configuration is not overridden, the MCU (by default) boots up in single
chip mode and the flash space is marked as valid at address 0x0. The flash
configuration field is checked during the reset sequence to see if the flash is
secured. If it is, the device always boots from internal flash because it is
marked as valid, regardless of what is done for chip configuration.
Address: CPU + 0x0C04 (FLASHBAR)
Access: User read/write
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
BA31 BA30 BA29 BA28 BA27 BA26 BA25 BA24 BA23 BA22 BA21 BA20 BA19
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
WP
0
AFS
C/I
SC
SD
UC
UD
V
1
1
The reset value for the valid bit is determined by the chip mode selected at reset (see
Chapter 12, “Chip Configuration Module
”).
W
Reset
0
0
0
0
0
0
0
1
0
0
1
0
0
0
0
0
Figure 17-3. Flash Base Address Register (FLASHBAR)
Table 17-2. FLASHBAR Field Descriptions
Bits
Description
31–19
BA[31:18]
Base address field. Defines the 0-modulo-512K base address of the flash module. By programming
this field, the flash may be located on any 512Kbyte boundary within the processor’s four gigabyte
address space.
18–9
Reserved, should be cleared.
8
WP
Write protect. Read only. Allows only read accesses to the flash. This bit is always set and any
attempted write access generates an access error exception to the ColdFire processor core.
0 Allows read and write accesses to the flash module
1 Allows only read accesses to the flash module
7
Reserved, should be cleared.
6
AFS
Address fetch speculation. Performance enhancement to generate speculative flash accesses. to
reduce the effective flash access time from the actual two-cycle array time to a smaller number
approaching one cycle.
0 Speculation enabled
1 Disable speculation
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
