UART Modules
Freescale Semiconductor
26-3
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
•
Start/end break interrupt/status
26.2
External Signal Description
briefly describes the UART module signals.
shows a signal configuration for a UART/RS-232 interface.
Figure 26-2. UART/RS-232 Interface
26.3
Memory Map/Register Definition
This section contains a detailed description of each register and its specific function. Flowcharts in
Section 26.5, “Initialization/Application Information
,” describe basic UART module programming.
Writing control bytes into the appropriate registers controls the operation of the UART module.
NOTE
UART registers are accessible only as bytes.
NOTE
Interrupt can mean an interrupt request asserted to the CPU or a DMA
request.
Table 26-1. UART Module External Signals
Signal
Description
UTXDn
Transmitter Serial Data Output. UTXDn is held high (mark condition) when the transmitter is
disabled, idle, or operating in the local loopback mode. Data is shifted out on UTXDn on the
falling edge of the clock source, with the least significant bit (lsb) sent first.
URXDn
Receiver Serial Data Input. Data received on URXDn is sampled on the rising edge of the clock
source, with the lsb received first.
UCTSn
Clear-to- Send. This input can generate an interrupt on a change of state.
URTSn
Request-to-Send. This output can be programmed to be negated or asserted automatically by
the receiver or the transmitter. When connected to a transmitter’s UCTSn, URTSn can control
serial data flow.
DO2
DI1
DI2
DO1
RS-232 Transceiver
UART
URXDn
UTXDn
UCTSn
URTSn
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Trade
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prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
