ColdFire Core
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
3-7
3.2.5
Program Counter (PC)
The PC contains the currently executing instruction address. During instruction execution and exception
processing, the processor automatically increments PC contents or places a new value in the PC. The PC
is a base address for PC-relative operand addressing.
The PC is initially loaded during reset exception processing with the contents at location 0x0000_0004.
3.2.6
Vector Base Register (VBR)
The VBR contains the base address of the exception vector table in the memory. To access the vector table,
the displacement of an exception vector is added to the value in VBR. The lower 20 bits of the VBR are
not implemented by ColdFire processors. They are assumed to be zero, forcing the table to be aligned on
a 1 MB boundary.
3.2.7
Status Register (SR)
The SR stores the processor status and includes the CCR, the interrupt priority mask, and other control
bits. In supervisor mode, software can access the entire SR. In user mode, only the lower 8 bits (CCR) are
accessible. The control bits indicate the following states for the processor: trace mode (T bit), supervisor
or user mode (S bit), and master or interrupt state (M bit). All defined bits in the SR have read/write access
when in supervisor mode. The lower byte of the SR (the CCR) must be loaded explicitly after reset and
before any compare (CMP), Bcc, or Scc instructions execute.
BDM: 0x80F (PC)
Access: User read/write
BDM read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
Address
W
Reset – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
Figure 3-6. Program Counter Register (PC)
BDM: 0x801 (VBR)
Access: Supervisor read/write
BDM read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
Base Address
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 3-7. Vector Base Register (VBR)
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International
Trade
Commission,
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to
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MCF52235CVM60