Pulse-Width Modulation (PWM) Module
Freescale Semiconductor
29-8
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
29.2.7
PWM Scale A Register (PWMSCLA)
PWMSCLA is the programmable scale value used in scaling clock A to generate clock SA. Clock SA is
generated with the following equation:
Eqn. 29-1
Any value written to this register causes the scale counter to load the new scale value (PWMSCLA).
3
PSWAI
PWM stops in doze mode. Disables the input clock to the prescaler while in doze mode.
0 Allow the clock to the prescaler while in doze mode
1 Stop the input clock to the prescaler when the core is in doze mode
2
PFRZ
PWM counters stop in debug mode (BKPT asserted).
0 Allow PWM counters to continue while in debug mode
1 Disable PWM input clock to the prescaler when the core is in debug mode. Useful for emulation as it allows the
PWM function to be suspended.
1–0
Reserved, must be cleared.
IPSBAR
Offset:
0x1B_0008 (PWMSCLA)
Access:
SupervisorRead/Write
7
6
5
4
3
2
1
0
R
SCALEA
W
Reset:
0
0
0
0
0
0
0
0
Figure 29-8. PWM Scale A Register (PWMSCLA)
Table 29-8. PWMSCLA Field Descriptions
Field
Description
7–0
SCALEA
Part of divisor used to form Clock SA from Clock A.
Table 29-7. PWMCTL Field Descriptions (continued)
Field
Description
Clock SA
Clock A
2
PWMSCLA
×
-----------------------------------------
=
SCALEA
Value
0x00
256
0x01
1
0x02
2
...
...
0xFF
255
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
