FlexCAN
Freescale Semiconductor
30-26
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
The free-running timer can optionally be reset upon the reception of a frame into message buffer 0. This
feature allows network time synchronization to be performed. See the CANCTRL[TSYN] bit.
30.3.18 Protocol Timing
The FlexCAN module CANCTRL register configures the bit timing parameters required by the CAN
protocol. The CLK_SRC, PRESDIV, RJW, PSEG1, PSEG2, and the PROPSEG fields allow the user to
configure the bit timing parameters.
The CANCTRL[CLK_SRC] bit defines whether the module uses the internal bus clock or the output of
the crystal oscillator via the EXTAL pin. The crystal oscillator clock should be selected when a tight
tolerance (up to 0.1%) is required for the CAN bus timing. The crystal oscillator clock has better jitter
performance than PLL generated clocks. The value of this bit should not be changed, unless the module is
in disable mode (CANMCR[MDIS] bit is set)
The PRESDIV field controls a prescaler that generates the serial clock (S-clock), whose period defines the
time quantum used to compose the CAN waveform. A time quantum is the atomic unit of time managed
by the CAN engine.
Figure 30-14. CAN Engine Clocking Scheme
Eqn. 30-6
A bit time is subdivided into three segments
1
(see
):
•
SYNC_SEG: Has a fixed length of one time quantum. Signal edges are expected to happen within
this section.
•
Time Segment 1: Includes the propagation segment and the phase segment 1 of the CAN standard.
It can be programmed by setting the PROPSEG and the PSEG1 fields of the CANCTRL register
so that their sum (plus 2) is in the range of 4 to 16 time quanta.
•
Time Segment 2: Represents the phase segment 2 of the CAN standard. It can be programmed by
setting the PSEG2 field of the CANCTRL register (plus 1) to be 2 to 8 time quanta long.
Eqn. 30-7
1. For further explanation of the underlying concepts please refer to ISO/DIS 11519–1, Section 10.3. Reference also the Bosch
CAN 2.0A/B protocol specification dated September 1991 for bit timing.
Oscillator Clock (EXTAL)
Prescaler
(1 .. 256)
S clock
1
0
(f
sys
)
Internal Bus Clock
CANCTRL[CLK_SRC]
f
Tq
f
sys
or EXTAL
P 1
(
)
---------------------------------------
=
Bit Rate
f
Tq
(number of Time Quanta)
-------------------------------------------------------------
=
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
