IEEE 1149.1 Test Access Port (JTAG)
Freescale Semiconductor
32-6
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
32.4
Functional Description
32.4.1
JTAG Module
The JTAG module consists of a TAP controller state machine, which is responsible for generating all
control signals that execute the JTAG instructions and read/write data registers.
32.4.2
TAP Controller
The TAP controller is a state machine that changes state based on the sequence of logical values on the
TMS pin.
shows the machine’s states. The value shown next to each state is the value of the
TMS signal sampled on the rising edge of the TCLK signal.
Asserting the TRST signal asynchronously resets the TAP controller to the test-logic-reset state. As
shows, holding TMS at logic 1 while clocking TCLK through at least five rising edges also
causes the state machine to enter the test-logic-reset state, whatever the initial state.
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
