FlexRay Communication Controller (FLEXRAY)
MPC5510 Microcontroller Family Reference Manual, Rev. 1
Freescale Semiconductor
30-51
Preliminary
The content of this register depends on the value of the T2_CFG bit in the
Timer Configuration and Control
. For a detailed description of timer T2, refer to
Section 30.6.17.2, “Absolute / Relative
.
NOTE
If timer T2 is configured as an
absolute
timer and the application modifies
the values in this register while the timer is running, the change becomes
effective immediately and the timer T2 will expire according to the changed
values.
If timer T2 is configured as a
relative
timer and the application changes the
values in this register while the timer is running, the change becomes
effective when the timer has expired according to the old values.
30.5.2.44 Slot Status Selection Register (SSSR)
This register is used to access the four internal non memory-mapped slot status selection registers SSSR0
to SSSR3. Each internal registers selects a slot, or symbol window/NIT, whose status vector will be saved
in the corresponding
Slot Status Registers (SSR0–SSR7)
according to
description of slot status monitoring, refer to
Section 30.6.18, “Slot Status Monitoring
Table 30-51. TI2CR1 Field Descriptions
Field
Description
Fields for absolute timer T2 (TICCR[T2_CFG] = 0)
T2_MTOFFSET
Timer T2 Macrotick Offset. This field holds the macrotick offset value for timer T2.
Fields for relative timer T2 (TICCR[T2_CFG] = 1)
T2_MTCNT[15:0]
Timer T2 Macrotick Low Word. This field defines the low word of the macrotick value for timer T2.
Base + 0x0064
16-bit write access required
Write: Anytime
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
SEL
0
SLOTNUMBER
W WMD
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 30-44. Slot Status Selection Register (SSSR)
Table 30-52. SSSR Field Descriptions
Field
Description
WMD
Write Mode. This control bit defines the write mode of this register.
0 Write to all fields in this register on write access.
1 Write to SEL field only on write access.
