Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5510 Microcontroller Family Reference Manual, Rev. 1
31-56
Freescale Semiconductor
Preliminary
31.4.4
Result FIFOs
31.4.4.1
RFIFO Basic Functionality
There are six RFIFOs located in the eQADC. Each RFIFO is four entries deep, and each RFIFO entry is
16 bits long. Each RFIFO serves as a temporary storage location for the one of the result queues allocated
in system memory. All result data is saved in the RFIFOs before being moved into the system result
queues. When an RFIFO is not empty, the eQADC sets the corresponding EQADC_FISRn[RFDF] (see
Section 31.3.3.8, “eQADC FIFO and Interrupt Status Registers 0–5 (EQADC_FISRn)
EQADC_IDCR
n
[RFDE] is asserted (see Section 31.3.3.7), the eQADC generates a request so that the
RFIFO entry is moved to a result queue. An interrupt request, served by the host CPU, is generated when
EQADC_IDCR
n
[RFDS] is negated, and an eDMA request, served by the eDMA, is generated when
RFDS is asserted. The host CPU or the eDMA responds to these requests by reading EQADC_RFPRn (see
Section 31.3.3.5, “eQADC Result FIFO Pop Registers 0–5 (EQADC_RFPRn)
”) to retrieve data from the
RFIFO.
NOTE
Reading a word, halfword, or any bytes from EQADC_RFPR
n
will pop an
entry from RFIFOn, and the RFCTR
n
field will be decremented by 1.
The eDMA controller should be configured to read a single result (16-bit
data) from the RFIFO pop registers for every asserted eDMA request it
acknowledges. Refer to
Section 31.5.2, “eQADC/eDMA Controller
” for eDMA controller configuration guidelines.
describes the important components in the RFIFO. Each RFIFO is implemented as a circular
set of registers to avoid the need to move all entries at each push/pop operation. The pop next data pointer
always points to the next RFIFO message to be retrieved from the RFIFO when reading eQADC_RFPR.
The receive next data pointer points to the next available RFIFO location for storing the next incoming
message from the on-chip ADC. The RFIFO counter logic counts the number of entries in RFIFO and
generates interrupt or eDMA requests to drain the RFIFO.
EQADC_FISRn[POPNXTPTR] (see
Section 31.3.3.8, “eQADC FIFO and Interrupt Status Registers 0–5
”) indicates which entry is currently being addressed by the pop next data pointer, and
EQADC_FISRn[RFCTR] provides the number of entries stored in the RFIFO. Using POPNXTPTR and
RFCTR, the absolute addresses for pop next data pointer and receive next data pointer can be calculated
using the following formulas:
Pop Next Data Pointer Address= RFIFO
n
_BASE_A POPNXTPTR
n
*4
Receive Next Data Pointer Address = RFIFO
n
_BASE_A
[(POPNXTPTR
n
+ RFCTR
n
) mod RFIFO_DEPTH] * 4
where
•
a
mod b
returns the remainder of the division of
a
by
b
.
•
RFIFO
n
_BASE_ADDRESS is the smallest memory mapped address allocated to an RFIFO
n
entry.
•
RFIFO_DEPTH is the number of entries contained in a RFIFO - four in this implementation.
