Crossbar Switch (XBAR)
MPC5510 Microcontroller Family Reference Manual, Rev. 1
15-4
Freescale Semiconductor
Preliminary
completion of all the transfers of a fixed-length burst or the negation of lock after a series of indivisible
transfers.
When a slave bus is being idled by the XBAR, it is parked on a specific master port. On the MPC5510, the
shared flash/AIPS/EBI slave port is parked on the e200z0, and the SRAM slave port is parked on the last
master to access it.
15.4.1
Master Ports
A master access will be taken if the slave port to which the access decodes is either currently servicing the
master or is parked on the master. In this case the XBAR will be completely transparent and the master’s
access will be immediately seen on the slave bus and no arbitration delays will be incurred. A master
access will be stalled if the access decodes to a slave port that is busy serving another master or parked on
another master.
If the slave port is currently parked on another master and no other master is requesting access to the slave
port, then only one clock of arbitration will be incurred. If the slave port is currently serving another master
and the arbitration logic selects a new master, then the new master gains controls over the slave port as
soon as the data phase of the current access is completed. When operating with fixed-priority arbitration,
if the slave port is currently servicing another master of a higher priority, then the lower-priority master
gains control of the slave port once the other master releases control of the slave port as long as no other
higher priority master is also waiting for the slave port.
A master access is terminated with an error if the access decodes to a location not occupied by a slave port.
This is the only time the XBAR will directly respond with an error response. All other error responses
received by the master are the result of error responses on the slave ports being passed through the XBAR.
15.4.2
Slave Ports
The goal of the XBAR with respect to the slave ports is to keep them 100% saturated when masters are
actively making requests. In order to do this the XBAR must not insert any pipeline stall cycles onto the
slave bus unless absolutely necessary.
There is only one instance when the XBAR will force a stall onto the slave bus when a master is actively
making a request. This occurs when a handoff of bus ownership occurs and there are no wait states from
the slave port. A requesting master which does not own the slave port will be granted access after a one
clock delay.
The only other time the XBAR will have control of the slave port is when no masters are making access
requests to the slave port and the XBAR is forced to park the slave port on a specific master. In this case,
the XBAR will force IDLE for the transfer type.
15.4.3
Arbitration
The XBAR supports two arbitration schemes: a fixed-priority algorithm, and a round-robin fairness
algorithm. The selected arbitration scheme is applied to all slave ports. On MPC5510, the XBAR defaults
to round robin priority arbitration. The priority arbitration scheme is selectable via the MCM
