Flash Array and Control
MPC5510 Microcontroller Family Reference Manual, Rev. 1
Freescale Semiconductor
22-11
Preliminary
22.4.2.3
High-Address Space Block Locking Register (HBL)
The high-address space block locking register provides a means to protect blocks from being modified.
MLOCK[1:0] Mid-Address Block Lock. A value of 1 in a bit of the lock register signifies that the corresponding block is locked
for program and erase. A value of 0 in the lock register signifies that the corresponding block is available to
receive program and erase pulses. Likewise, the lock register is not writable if a high-voltage operation is
suspended.
Upon reset, information from the shadow row is loaded into the block registers. The LOCK bits may be written as
a register. Reset will cause the bits to go back to their shadow row value. The default value of the LOCK bits
(assuming erased fuses) would be locked.
If blocks are not present (due to configuration or total memory size), the LOCK bits will default to locked, and will
not be writable. The reset value will always be 1 (independent of the shadow row), and register writes will have
no effect.
MLOCK is not writable unless LME is high.
bits 16–21
Reserved.
LLOCK[9:0] Low-Address Block Lock. These bits have the same description and attributes as MLOCK. As an example of how
the LLOCK bits are used, if a configuration has sixteen 16 KB blocks in the low-address space
(MCR[LAS] = 0b011), the block residing at address FLASH_REG 0x0000, will correspond to LLOCK0.
The next 16 KB block will correspond to LLOCK1, and so on up to LLOCK15.
Offset: FLASH_REG 0x0008
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R HBE
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
W
Reset
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
1
1
1
1
1
1
1
1
HBLOCK[7:0]
W
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Figure 22-6. High-Address Space Block Locking Register (HBL)
Table 22-6. HBL Field Descriptions
Field
Description
HBE
High-Address Lock Enable. Enables the locking field (HLOCK) to be set or cleared by register writes. This
bit is a status bit only, may not be written or cleared, and the reset value is 0. To set this bit, write a password
and if the password matches, the HBE bit will be set to reflect the status of enabled. It is enabled until a
reset operation occurs. For HBE, the password 0xB2B2_2222 must be written to HBL.
0 High address locks are disabled, and cannot be modified
1 High address locks are enabled to be written
Table 22-5. LML Field Descriptions (continued)
Field
Description
