Inter-Integrated Circuit Bus Controller Module (I
2
C)
MPC5510 Microcontroller Family Reference Manual, Rev. 1
Freescale Semiconductor
27-5
Preliminary
27.3.2
Register Descriptions
This section lists the I
2
C registers in address order and describes the registers and their bit fields.
27.3.2.1
I
2
C Bus Address Register (IBAD)
This register contains the address the I
2
C bus will respond to when addressed as a slave; it is not the
address sent on the bus during the address transfer.
27.3.2.2
I
2
C Bus Frequency Divider Register (IBFD)
Offset: 0x00000
Access: Read/write any time
0
1
2
3
4
5
6
7
R
AD
0
W
Reset
0
0
0
0
0
0
0
0
Figure 27-3. I
2
C Bus Address Register (IBAD)
Table 27-2. IBAD Field Descriptions
Field
Description
0–6
AD
Slave Address. Specific slave address to be used by the I
2
C bus module.
Note: The default mode of I
2
C bus is slave mode for an address match on the bus.
7
Reserved, must be cleared; will always read 0.
Offset: 0x0001
Access: Read/write any time
0
1
2
3
4
5
6
7
R
MULT
ICR
W
Reset
0
0
0
0
0
0
0
0
Figure 27-4. I
2
C Bus Frequency Divider Register (IBFD)
