Periodic Interrupt Timer and Real Time Interrupt (PIT_RTI)
MPC5510 Microcontroller Family Reference Manual, Rev. 1
Freescale Semiconductor
28-5
Preliminary
28.3.2.1
PIT RTI / Timer Load Value Register (TLVAL0–TLVAL8)
These registers select the timeout period for the timer interrupts. In the case of the RTI, it will take several
cycles until this value is synchronized into the RTI clock domain. For all other timers the value change is
visible immediately.
28.3.2.2
PIT Current RTI / Timer Values (TVAL0–TVAL8)
These registers indicate the current timer position. In the case of the RTI, this will show a value which is
several cycles old, since it originates from a potentially different clock domain.
Offset: 0x0000–0x002B
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
TSV
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
TSV
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 28-2. PIT Timer Load Value Register (TLVAL0–TLVAL8)
Table 28-3. TLVAL0–TLVAL8 Field Descriptions
Field
Description
TSV
Time Start Value Bits. These bits set the timer start value. The timer will count down until it reaches 0,
then it will generate an interrupt and load this register value again. Writing a new value to this register will
not restart the timer, instead the value will be loaded after the timer expires. To abort the current cycle
and start a timer period with the new value, the timer must be disabled and enabled again (see
Note: For the RTI, the timer must not be set to a value lower than 32 cycles, otherwise interrupts may be
lost, as it takes several cycles to clear the RTI interrupt. For the other timers, this limit does not
apply, however there will be practical limits because the processor will require several cycles to
service an interrupt.
Offset: 0x0080–0x00A0
Access: User read
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
TVL
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
TVL
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 28-3. PIT Current Timer Values (TVAL0–8)
