FlexRay Communication Controller (FLEXRAY)
MPC5510 Microcontroller Family Reference Manual, Rev. 1
Freescale Semiconductor
30-13
Preliminary
•
Strobe Signal Control Register (STBSCR)
•
Slot Status Selection Register (SSSR)
•
Slot Status Counter Condition Register (SSCCR)
•
Receive Shadow Buffer Index Register (RSBIR)
Each of these memory-mapped registers provides a SEL field and a WMD bit. The SEL field is used to
select the internal register. The WMD bit controls the write mode. If the WMD bit is set to 0 during the
write access, all fields of the internal register are updated. If the WMD bit set to 1, only the SEL field is
changed. All other fields of the internal register remain unchanged. This allows for reading back the values
of the selected internal register in a subsequent read access.
30.5.2.3
Module Version Register (MVR)
This register provides the FlexRay block version number. The module version number is derived from the
CHI version number and the PE version number.
30.5.2.4
Module Configuration Register (MCR)
This register defines the global configuration of the FlexRay block.
Base + 0x0000
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
CHIVER
PEVER
W
Reset
1
0
0
0
0
0
1
1
0
1
1
0
0
1
1
0
Figure 30-2. Module Version Register (MVR)
Table 30-7. MVR Field Descriptions
Field
Description
CHIVER
CHI Version Number.This field provides the version number of the controller host interface.
PEVER
PE Version Number. This field provides the version number of the protocol engine.
Base + 0x0002
Write: MEN, SCM, CHB, CHA, CLKSEL, BITRATE: Disabled Mode
SFFE: Disabled Mode or
POC:config
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
MEN
0
SCM
CHB
CHA
SFFE
0
R*
0
0
0
CLKS
EL
BITRATE
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 30-3. Module Configuration Register (MCR)
