FlexRay Communication Controller (FLEXRAY)
MPC5510 Microcontroller Family Reference Manual, Rev. 1
Freescale Semiconductor
30-85
Preliminary
Figure 30-103. Example of FRM Layout
30.6.4.1
Message Buffer Header Area
The message buffer header area contains all message buffer header fields of the physical message buffers
for all message buffer types. The following rules apply to the message buffer header fields for the three
type of message buffers.
1. The start address SADR_MBHF of each message buffer header field for
individual message
buffers
and
receive shadow buffers
must fulfill
.
SADR_MBHF = (i * 10) + SYS_MEM_BASE_ADDR; (0 <= i < 128)
Eqn. 30-7
2. The start address SADR_MBHF of each message buffer header field for the
receive FIFO
must
fulfill
SADR_MBHF = (i * 10) + SYS_MEM_BASE_ADDR; (0 <= i < 1024)
Eqn. 30-8
3. The message buffer header fields for a receive FIFO have to be a contiguous area.
30.6.4.2
Message Buffer Data Area
The message buffer data area contains all the message buffer data fields of the physical message buffers.
Each message buffer data field must start at a 16-bit boundary.
Me
ssage Buffer Header Area
FRM
Message Buffer Data Area
Sync Frame Table Area
Data Field Offset
Frame Header
Slot Status
Data Field Offset
Frame Header
Slot Status
Message Buffer Header Fields
Individual Message Buffers
Receive Shadow Buffers
Data Field Offset
Frame Header
Slot Status
Data Field Offset
Frame Header
Slot Status
Message Buffer Header Fields
Receive FIFO A
Data Field Offset
Frame Header
Slot Status
Data Field Offset
Frame Header
Slot Status
Message Buffer Header Fields
Receive FIFO B
Data Field Offset
Frame Header
Slot Status
10 bytes
SYS_MEM_BASE_ADDR
System Memory
