System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual,
Rev. 5
Freescale Semiconductor
6-47
6.3.1.12.30
Pad Configuration Register 70 (SIU_PCR70)
The SIU_PCR70 register controls the pin function, direction, and static electrical attributes of the
TA_GPIO[70] pin.
Figure 6-42. TA_GPIO[70] Pad Configuration Register (SIU_PCR70)
6.3.1.12.31
MPC5553: Pad Configuration Register 71 (SIU_PCR71)
The SIU_PCR71 register controls the pin function, direction, and static electrical attributes of the
TEA_CAL_CS[0]_GPIO[71] pin.
Figure 6-43. MPC5553: TEA_CAL_CS[0]_GPIO[71] Pad Configuration Register (SIU_PCR71)
Refer to
for bit field definitions. The PA field for the MPC5553’s PCR71 is given in
Address: Base + 0x00CC
Access: Read / write[5:11, 14:15]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
PA
OBE
1
1
When configured as TA, the OBE bit has no effect. When configured as GPO, set the OBE bit to 1.
IBE
2
2
When configured as TA, or GPIO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register. Clear the IBE
to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
DSC
ODE
3
3
When configured as TA and external master operation is enabled, clear the ODE bit to 0.
HYS
4
4
If external master operation is enabled, clear the HYS bit to 0.
0
0
WPE
5
5
Refer to the EBI section for weak pullup settings when configured as TA.
WPS
W
RESET:
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
Address: Base + 0x00CE
Access: Read / write[3:11, 14:15]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
PA
OBE
1
1
When configured as TEA or CAL_CS[0], the OBE bit has no effect. When configured as GPO,set the OBE bit to 1.
IBE
2
2
When configured as TEA, CAL_CS[0], or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register.
Clear the IBE to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
DSC
ODE
3
3
When configured as TEA and external master operation is enabled, set the ODE bit to 0.
HYS
4
4
If external master operation is enabled, clear the HYS bit to 0.
0
0
WPE
5
5
Refer to the EBI section for weak pullup settings when configured as TEA or CAL_CS[0].
WPS
W
RESET:
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
Summary of Contents for MPC5553
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