System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual,
Rev. 5
6-56
Freescale Semiconductor
Figure 6-56. CNRXC_PCSD[4]_GPIO[88] Pad Configuration Register (SIU_PCR88)
Refer to
for bit field definitions.
6.3.1.12.45
Pad Configuration Register 89 (SIU_PCR89)
The SIU_PCR89 register controls the pin function, direction, and static electrical attributes of the
TXDA_GPIO[89] pin.
Figure 6-57. TXDA_GPIO[89] Pad Configuration Register (SIU_PCR89)
Refer to
for bit field definitions.
Address: Base + 0x00F0
Access: Read / write[4:7, 10:15]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
PA
OBE
1
1
When configured as CNRXC or PCS, the OBE bit has no effect. When configured as GPO, set the OBE bit to 1.
IBE
2
2
When configured as CNRXC or PCS or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register.
Clear the IBE to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
0
0
ODE
HYS
SRC
WPE
WPS
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
Address: Base + 0x00F2
Access: Read / write[5:7, 10:15]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
PA
OBE
1
1
When configured as TXDA, the OBE bit has no effect. When configured as GPO, set the OBE bit to 1.
IBE
2
2
When configured as TXDA or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register. For SCI loop
back operation the IBE bit must be set to 1. Clear the IBE to 0 to reduce power consumption. When configured as GPI, set the
IBE bit to 1.
0
0
ODE
HYS
SRC
WPE
WPS
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
Summary of Contents for MPC5553
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