System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual,
Rev. 5
Freescale Semiconductor
6-75
6.3.1.12.82
Pad Configuration Register 145 (SIU_PCR145)
The SIU_PCR145 register controls the pin function, direction, and static electrical attributes of the
ETPUA[31]_PCSC[4]_GPIO[145] pin.
Figure 6-94. ETPUA[31]_PCSC[4]_GPIO[145] Pad Configuration Register (SIU_PCR145)
Refer to
for bit field definitions.
6.3.1.12.83
MPC5554: Pad Configuration Register 146 (SIU_PCR146)
NOTE
The MPC5553 does not implement PCR146. This register is reserved in the
MPC5553.
The SIU_PCR146 register controls the pin function, direction, and static electrical attributes of the
TCRCLKB_IRQ[6]_GPIO[146] pin.
Figure 6-95. MPC5554: TCRCLKB_IRQ[6]_GPIO[146] Pad Configuration Register (SIU_PCR146)
Refer to
for bit field definitions.
Address: Base + 0x0162
Access: Read / write[4:7, 10:15]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
PA
OBE
1
1
When configured as PCS, the OBE bit has no effect. When configured as ETPUA output or GPO, set the OBE bit to 1.
IBE
2
2
When configured as ETPUA output, PCS, or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI
register. Clear the IBE to 0 to reduce power consumption. The IBE bit must be set to 1 for ETPUA or GPIO when configured
as input.
0
0
ODE
HYS
SRC
WPE
WPS
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
U
3
3
The weak pullup/down selection at reset for the ETPUA[31] pin is determined by the WKPCFG pin.
Address: Base + 0x0164
Access: Read / write[4:7, 10:15]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
PA
OBE
1
1
When configured as TCRCLKB or IRQ, the OBE bit has no effect. When configured as GPO, set the OBE bit to 1.
IBE
2
2
When configured as TCRCLKB, IRQ, or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register.
Clear the IBE to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
0
0
ODE
HYS
SRC
WPE
WPS
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
Summary of Contents for MPC5553
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