MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor
22-25
22.4.3
Receive Process
The CPU prepares a message buffer for frame reception by executing the following steps:
•
Write the CODE field of the control and status word to keep the RX MB inactive (CODE = 0000).
•
Write the ID word.
•
Write the CODE field of the control and status word to mark the MB as EMPTY.
The first and last steps are mandatory.
22.4.3.1
Matching Process
The matching process compares the IDs of all active RX message buffers to newly received frames, so
that, if a match occurs, a newly received frame is transferred (moved in) to the first (that is, lowest entry)
matching MB. Only MBs marked as EMPTY, FULL, or OVERRUN will participate in the internal
matching process at the CRC frame field. The internal matching process takes place every time the receiver
receives an error free frame.
The value of the free running timer is written into the TIME STAMP field in the MB. The ID field, the
DATA field (8 bytes at most), and the LENGTH field are stored, the CODE field is updated, and a status
flag is set in CAN
x
_IFRL or CAN
x
_IFRH, and an interrupt is generated if the corresponding interrupt
mask is enabled in CAN
x
_IMRL/H.
The CPU should read an RX frame from its MB in the following way:
•
Control and status word (mandatory, activates internal lock for this buffer)
•
ID (optional, needed only if a mask was used)
•
DATA field words
•
Free running timer (optional, releases internal lock)
Reading the free running timer is not mandatory. If not executed, the MB remains locked, unless the CPU
starts reading another MB. Note that only a single MB is locked at a time. The only mandatory CPU read
operation is of the control and status word, to assure data coherency. If the BUSY bit is set in the CODE
field, then the CPU should defer the access to the MB until this bit is negated.
The CPU should synchronize to frame reception by the status flag bit for the specific MB in one of the
CANx_IFRH and CANx_IFRL registers and not by the control and status word code field of that MB.
Polling the CODE field does not work because after a frame was received and the CPU services the MB
(by reading the C/S word followed by unlocking the MB), the CODE field will not return to EMPTY. It
will remain FULL, as explained in
. If the CPU tries to workaround this behavior by writing to
the C/S word to force an EMPTY code after reading the MB, the MB is actually deactivated from any
currently ongoing matching process. As a result, a newly received frame matching the ID of that MB may
be lost. In summary: never do polling by reading directly the C/S word of the MBs. Instead, read the
CANx_IFRH and CANx_IFRL registers.
Note that the received ID field is always stored in the matching MB, thus the contents of the ID field in a
MB can change if the match was due to mask.
22.4.3.2
Self Received Frames
FlexCAN2 receives frames transmitted by itself if there exists an RX matching MB, but only if an ACK
is generated by an external node or if loop-back mode is enabled.
Summary of Contents for MPC5553
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