System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual,
Rev. 5
6-44
Freescale Semiconductor
6.3.1.12.25
MPC5553: Pad Configuration Registers 64–65 (SIU_PCR64–SIU_PCR65)
The SIU_PCR64–SIU_PCR65 registers control the pin function, direction, and static electrical attributes
of the WE/BE[0:1]_GPIO[64:65] pins. The PA bit in the PCR64–65 registers selects between the write
enable/byte enable and GPIO functions. The WEBS bit in the EBI base registers selects between the write
enable and byte enable function.
Figure 6-38. MPC5553: WE/BE[0:1]_GPIO[64:65]
Pad Configuration Registers (SIU_PCR64–SIU_PCR65)
Refer to
for bit field definitions.
6.3.1.12.26
MPC5553: Pad Configuration Registers 66–67 (SIU_PCR66–SIU_PCR67)
The SIU_PCR66–SIU_PCR67 registers control the pin function, direction, and static electrical attributes
of the WE/BE[2:3]_CAL_WE/BE[0:1]_GPIO[66:67] pins. The PA bit in the PCR66–67 registers selects
between the write-enable/byte-enable function and the GPIO function. Set the WEBS bit in the EBI base
registers to select between the write-enable or byte-enable function.
Figure 6-39. MPC5553: WE/BE[2:3]_CAL_WE/BE[0:1]_GPIO[66:67]
Pad Configuration Registers (SIU_PCR66–SIU_PCR67)
Refer to
for bit field definitions. The PA field for the MPC5553 PCR66–PCR67 is given in
.
Address: Base + 0x00C0 and Base + 0x00C2
Access: Read / write[5:11, 14:15]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
PA
OBE
1
1
When configured as WE/BE[0:1], the OBE bit has no effect. When configured as GPO, set the OBE bit to 1.
IBE
2
2
When configured as WE/BE[0:1] or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding GPDI register. Clear
the IBE to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
DSC
ODE
3
3
When configured as WE/BE[0:1], clear the ODE bit to 0.
HYS
0
0
WPE
4
4
Refer to the EBI section for weak pullup settings when configured as WE/BE[0:1].
WPS
W
RESET:
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
Address: Base + 0x00C4 through Base + 0x00C6
Access: Read / write[3:11, 14:15]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
PA
OBE
1
1
When configured as WE/BE[2:3], CAL_WE/BE[0:1], the OBE bit has no effect. When configured as GPO, set the OBE bit to 1.
IBE
2
2
When configured as WE/BE[2:3], CAL_WE/BE[0:1], or GPO, set the IBE bit to 1 to reflect the pin state in the corresponding
GPDI register. Clear the IBE to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
DSC
ODE
3
3
When configured as WE/BE[2:3], CAL_WE/BE[0:1], clear the ODE bit to 0.
HYS
0
0
WPE
4
4
Refer to the EBI section for weak pullup settings when configured as WE/BE[2:3], CAL_WE/BE[0:1].
WPS
W
RESET:
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
Summary of Contents for MPC5553
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