System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual,
Rev. 5
Freescale Semiconductor
6-49
6.3.1.12.33
MPC5553: Pad Configuration Register 72 (SIU_PCR72)
The SIU_PCR72 register controls the pin function, direction, and static electrical attributes of the
BR(CAL_ADDR[10])_FEC_MDC_CAL_CS[2]_GPIO[72] pin. The BR function is not available on the
MPC5553. Instead, the PA encoding is used for CAL_ADDR[10]. This register allows selection of the
CAL_ADDR[10], FEC_MDC, CAL_CS[2], and GPIO functions.
Figure 6-45. MPC5553: BR(CAL_ADDR[10])_FEC_MDC_CAL_CS[2]_GPIO[72]
Pad Configuration Register (SIU_PCR72)
Refer to
for bit field definitions. The PA field for MPC5553 PCR72 is given in
Address: Base + 0x00D0
Access: Read / write[3:11, 14:15]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
PA
1
1
The BR function is not available on the MPC5553. Set the PA field to 0b001 or 0b011 to select the CAL_ADDR[10] signal to use
the calibration bus on the MPC5553.
OBE
2
2
When configured as CAL_ADDR[10], FEC_MDC, or CAL_CS[2], the OBE bit has no effect. When configured as GPO, set the
OBE bit to 1.
IBE
3
3
When configured as CAL_ADDR[10], FEC_MDC, CAL_CS[2], or GPO, set the IBE bit to 1 to reflect the pin state in the
corresponding GPDI register. Clear the IBE to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
DSC
ODE
4
4
When configured as CAL_ADDR[10] or CAL_CS[2], clear the ODE bit to 0.
HYS
5
5
If external master operation is enabled, clear the HYS bit to 0.
0
0
WPE
6
6
Refer to the EBI section for weak pullup settings when configured as CAL_ADDR[10] or CAL_CS[2].
WPS
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
Table 6-39. PCR72 PA Field Definition
PA Field
Pin Function
0b000
GPIO[72]
0b001
CAL_ADDR[10]
0b010
FEC_MDC
0b011
CAL_ADDR[10]
0b100
CAL_CS[2]
1
1
For calibration only.
Summary of Contents for MPC5553
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