MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
12-68
Freescale Semiconductor
12.5
Initialization/Application Information
12.5.1
Booting from External Memory
The EBI block does not support booting directly to external memory (i.e. fetching the first instruction after
reset externally). The MPC5553 and MPC5554 use an internal boot assist module, which executes after
each reset. The BAM code performs basic configuration of the EBI block, allowing for external boot if
desired. Refer to
Chapter 16, “Boot Assist Module (BAM)
” for detail information about the boot modes
supported by the MPC5554.
If code in external memory needs to write EBI registers, this must be done in a way that avoids modifying
EBI registers while external accesses are being performed, such as the following method:
•
Copy the code that is doing the register writes (plus a return branch) to internal SRAM
•
Branch to internal SRAM to run this code, ending with a branch back to external flash
12.5.2
Running with SDR (Single Data Rate) Burst Memories
This includes flash and external SRAM memories with a compatible burst interface. BDIP is required only
for some SDR memories.
shows a block diagram of an MCU connected to a 32-bit SDR burst
memory.
Figure 12-51. MCU Connected to SDR Burst Memory
Refer to
for an example of the timing of a typical burst read operation to an SDR burst
memory. Refer to
for an example of the timing of a typical single write operation to SDR
memory.
12.5.3
Running with Asynchronous Memories
The EBI also supports asychronous memories. In this case, the CLKOUT, TS, and BDIP pins are not used
by the memory and bursting is not supported. However, the EBI still drives these outputs, and always
drives and latches all signals at positive edge CLKOUT (i.e., there is no asynchronous mode for the EBI).
The data timing is controlled by setting the SCY bits in the appropriate option register to the proper number
CLKOUT
CS0
TS
WE0/BE0
ADDR[8:29]
DATA[0:31]
BDIP
OE
MCU
CK
CE
ADV
BAA*
WE**
A[0:21]
D[0:31]
OE
SDR burstable
flash or SRAM
* May or may not be connected, depending on the memory used.
Flash memories typically use one WE signal as shown, RAMs use 2 or 4 (16-bit or 32-bit).
**
CAL_CS0***
*** MPC5553 Only
4M x 32
Summary of Contents for MPC5553
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