CAN 2.0B Controller Module
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor
16-15
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The user configures the message buffers for reception
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The TouCAN transfers received messages from the serial message buffers to the receive message
buffers with matching IDs
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The user retrieves these messages
The user should prepare or change a message buffer for frame reception by executing the following steps.
1. Write the control/status word to hold the receive buffer inactive (code = 0b0000)
2. Write the ID_HIGH and ID_LOW words
3. Write the control/status word to mark the receive message buffer as active and empty
NOTE
Steps 1 and 3 are mandatory for data coherency.
Once these steps are performed, the message buffer functions as an active receive buffer and participates
in the internal matching process, which takes place every time the TouCAN receives an error-free frame.
In this process, all active receive buffers compare their ID value to the newly received one. If a match is
detected, the following actions occur:
1. The frame is transferred to the first (lowest entry) matching receive message buffer
2. The value of the free-running timer (captured at the beginning of the identifier field on the CAN
bus) is written into the time stamp field in the message buffer
3. The ID field, data field, and Rx length field are stored
4. The code field is updated
5. The status flag is set in the IFLAG register
The user should read a received frame from its message buffer in the following order:
1. Control/status word (mandatory, as it activates the internal lock for this buffer)
2. ID (optional, since it is needed only if a mask was used)
3. Data field word(s)
4. Free-running timer (optional, as it releases the internal lock)
If the free running timer is not read, that message buffer remains locked until the read process starts for
another message buffer. Only a single message buffer is locked at a time. When a received message is read,
the only mandatory read operation is that of the control/status word. This ensures data coherency.
If the BUSY bit is set in the message buffer code, the CPU should defer accessing that buffer until this bit
is negated. Refer to
NOTE
The user should check the status of a message buffer by reading the status
flag in the IFLAG register and not by reading the control/status word code
field for that message buffer. This prevents the buffer from being locked
inadvertently.
Because the received identifier field is always stored in the matching receive message buffer, the contents
of the identifier field in a receive message buffer may change if one or more of the ID bits are masked.
Summary of Contents for MPC561
Page 84: ...MPC561 MPC563 Reference Manual Rev 1 2 lxxxiv Freescale Semiconductor...
Page 144: ...Signal Descriptions MPC561 MPC563 Reference Manual Rev 1 2 2 46 Freescale Semiconductor...
Page 206: ...Central Processing Unit MPC561 MPC563 Reference Manual Rev 1 2 3 62 Freescale Semiconductor...
Page 302: ...Reset MPC561 MPC563 Reference Manual Rev 1 2 7 14 Freescale Semiconductor...
Page 854: ...Time Processor Unit 3 MPC561 MPC563 Reference Manual Rev 1 2 19 24 Freescale Semiconductor...
Page 968: ...Development Support MPC561 MPC563 Reference Manual Rev 1 2 23 54 Freescale Semiconductor...
Page 1144: ...Internal Memory Map MPC561 MPC563 Reference Manual Rev 1 2 B 34 Freescale Semiconductor...
Page 1212: ...TPU3 ROM Functions MPC561 MPC563 Reference Manual Rev 1 2 D 60 Freescale Semiconductor...
Page 1216: ...Memory Access Timing MPC561 MPC563 Reference Manual Rev 1 2 E 4 Freescale Semiconductor...
