66-MHz Electrical Characteristics
MPC561/MPC563 Reference Manual, Rev. 1.2
G-10
Freescale Semiconductor
G.7
Oscillator and PLL Electrical Characteristics
Note:
(V
DD
= 2.6 V
±
0.1 V, V
DDH
= 5.0 V
±
0.25 V, T
A
= T
L
to T
H
)
2
This characteristic is for 5-V output and 5-V input pins.
3
0.3V > V
DDA
or V
DDH
, whichever is greater.
4
Within this range, no significant injection will be seen. See QADC64 Disruptive Input Current (I
NA
).
5
During reset all 2.6V and 2.6V/5V pads will leak up to 10
µ
A to QVDDL if the pad has a voltage > QVDDL.
6
Maximum leakage occurs at maximum operating temperature. Current decreases by approximately one-half for each
8 to 12 °C, in the ambient temperature range of 50 to 125 °C.
7
All bus pins support two drive strengths capabilities, 25 pF and 50 pF. Current drive is less at the 25-pF
capacitive load. Both modes achieve 66-MHz timing.
8
Only IRQ, TPU, MIOS, GPIO, QADC (when digital inputs) and RESET pins have hysteresis, thus there is no hysteresis
specification on all other pins
9
Transient currents can reach 50mA.
10
KAPWR and IRAMSTBY
can be powered-up prior to any other supply or at the same time as the other 2.6 V supplies.
IRAMSTBY must lead or coincide with VDD; however it can lag KAPWR.
11
This parameter is periodically sampled rather than 100% tested
12
Up to 0.5 V during power up/down.
13
To obtain full-range results, V
SSA
≤
V
RL
≤
V
INDC
≤
V
RH
≤
V
DDA
14
When using the QADC in legacy mode it is recommended to connect this pin to 2.6V or 3.3V, however it can be
connected to 0V or 5V without damage to the device.
15
A resistor must be placed in series with the IRAMSTBY power supply. Refer to
16
All injection current is transferred to the V
DDH
. An external load is required to dissipate this current to maintain the
power supply within the specified voltage range.
17
Absolute maximum voltage ratings for each pin (see
) must also be met during this condition.
18
Total injection current for all I/O pins on the chip must not exceed 20 mA (sustained current). Exceeding this limit can
cause disruption of normal operation.
19
Current refers to two QADC64 modules operating simultaneously.
20
Below disruptive current conditions, the channel being stressed has conversion values of 0x3FF for analog inputs
greater than V
RH
and 0x000 for values less than V
RL
. This assumes that V
RH
≤
V
DDA
and V
RL
≥
V
SSA
due to the
presence of the sample amplifier. Other channels are not affected by non-disruptive conditions.
Table G-5. Oscillator and PLL
Characteristic
Symbol
Min
Typica
l
Max
Unit
1
Oscillator Startup time (for typical crystal capacitive load)
4-MHz crystal
20-MHz crystal
OSCstart4
OSCstart20
10
10
ms
ms
2
PLL Lock Time
T
LOCK
1000
1
Input
Clocks
3
PLL Operating Range
2
F
VCOOUT
30
132
MHz
4
Crystal Operating Range, MODCK=0b010,0b110
MODCK[1:3] = 0b001, 0b011, 0b100, 0b101, 0b111
F
CRYSTAL
3
15
5
25
MHz
MHz
5
PLL Jitter
PLL Jitter (averaged over 10
µ
s)
F
JIT
F
JIT10
-1%
-0.3%
+1%
+0.3%
—
6
Limp Mode Clock Out Frequency
—
3
3
11
17
3
MHz
7
Oscillator Bias Current (XTAL)
4 MHz
20 MHz
I
BIAS
—
| 1.5 |
| 0.8 |
| 4.0 |
mA
mA
Summary of Contents for MPC561
Page 84: ...MPC561 MPC563 Reference Manual Rev 1 2 lxxxiv Freescale Semiconductor...
Page 144: ...Signal Descriptions MPC561 MPC563 Reference Manual Rev 1 2 2 46 Freescale Semiconductor...
Page 206: ...Central Processing Unit MPC561 MPC563 Reference Manual Rev 1 2 3 62 Freescale Semiconductor...
Page 302: ...Reset MPC561 MPC563 Reference Manual Rev 1 2 7 14 Freescale Semiconductor...
Page 854: ...Time Processor Unit 3 MPC561 MPC563 Reference Manual Rev 1 2 19 24 Freescale Semiconductor...
Page 968: ...Development Support MPC561 MPC563 Reference Manual Rev 1 2 23 54 Freescale Semiconductor...
Page 1144: ...Internal Memory Map MPC561 MPC563 Reference Manual Rev 1 2 B 34 Freescale Semiconductor...
Page 1212: ...TPU3 ROM Functions MPC561 MPC563 Reference Manual Rev 1 2 D 60 Freescale Semiconductor...
Page 1216: ...Memory Access Timing MPC561 MPC563 Reference Manual Rev 1 2 E 4 Freescale Semiconductor...
