System Configuration and Protection
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor
6-19
Refer to
Section 3.9.5, “Decrementer Register (DEC)
,” for more information.
6.1.7
Time Base (TB)
The time base (TB) is a 64-bit free-running binary counter defined by the MPC500 architecture. The TB
has two independent reference registers which can generate a maskable interrupt when the time base
counter reaches the value programmed in one of the two reference registers. The period of the TB depends
on the driving frequency. The TB is clocked by the TMBCLK clock. The period for the TB is:
The state of TB is not affected by any resets and should be initialized by software. Reads and writes of the
TB are restricted to special instructions. Separate special-purpose registers are defined in the MPC500
architecture for reading and writing the TB. For the MPC561/MPC563 implementation, it is not possible
to read or write the entire TB in a single instruction. Therefore, the mttb and mftb instructions are used to
move the lower half of the time base (TBL) while the mttbu and mftbu instructions are used to move the
upper half (TBU).
Two reference registers are associated with the time base: TBREF0 and TBREF1. A maskable interrupt is
generated when the TB count reaches to the value programmed in one of the two reference registers. Two
status bits in the time base control and status register (TBSCR) indicate which one of the two reference
registers generated the interrupt.
Refer to
Section 6.2.2.4, “System Timer Registers
,” for diagrams and bit descriptions of TB registers.
Refer to
Section 3.9.4, “Time Base Facility (TB) — OEA
,” and to the
RCPU Reference Manual
for
additional information.
6.1.8
Real-Time Clock (RTC)
The RTC is a 32-bit counter and pre-divider used to provide a time-of-day indication to the operating
system and application software as show in
. It is clocked by the PITRTCLK clock. The counter
99
100 µs
20 µs
999
1.0 ms
200 µs
9999
10.0 ms
2 ms
999999
1.0 s
200 ms
9999999
10.0 s
2.0 s
99999999
100.0 s
20 s
999999999
1000 s
200 s
(hex) FFFFFFFF
4295 s
859 s
Table 6-6. Decrementer Time-Out Periods (continued)
Count Value
Time-Out @ 4 MHz
Time-Out @ 20 MHz
T
TB
2
64
F
TMBCLK
------------------------------
=
Summary of Contents for MPC561
Page 84: ...MPC561 MPC563 Reference Manual Rev 1 2 lxxxiv Freescale Semiconductor...
Page 144: ...Signal Descriptions MPC561 MPC563 Reference Manual Rev 1 2 2 46 Freescale Semiconductor...
Page 206: ...Central Processing Unit MPC561 MPC563 Reference Manual Rev 1 2 3 62 Freescale Semiconductor...
Page 302: ...Reset MPC561 MPC563 Reference Manual Rev 1 2 7 14 Freescale Semiconductor...
Page 854: ...Time Processor Unit 3 MPC561 MPC563 Reference Manual Rev 1 2 19 24 Freescale Semiconductor...
Page 968: ...Development Support MPC561 MPC563 Reference Manual Rev 1 2 23 54 Freescale Semiconductor...
Page 1144: ...Internal Memory Map MPC561 MPC563 Reference Manual Rev 1 2 B 34 Freescale Semiconductor...
Page 1212: ...TPU3 ROM Functions MPC561 MPC563 Reference Manual Rev 1 2 D 60 Freescale Semiconductor...
Page 1216: ...Memory Access Timing MPC561 MPC563 Reference Manual Rev 1 2 E 4 Freescale Semiconductor...
