Clocks and Power Control
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor
8-3
8.1
System Clock Sources
The system clock can be provided by the main system oscillator, an external clock input, or the backup
clock (BUCLK) on-chip ring oscillator, see
.
The main system oscillator uses either a 4-MHz or 20-MHz crystal to generate the PLL reference clock.
When the main system oscillator output is the timing reference to the system PLL, skew elimination
between the XTAL/EXTAL pins and CLKOUT is not guaranteed. There is also an on-chip crystal
feedback resistor on the MPC561/MPC563; however, space should be reserved for an off-chip resistor to
allow for future configurations.
illustrates the main system oscillator crystal configuration.
The external clock input (EXTCLK pin) can receive a clock signal from an external source. The clock
frequency must be in the range of 3-5 MHz or, for 1:1 mode, at the system frequency of at least 15 MHz.
When the external clock input is the timing reference to the system PLL, the skew between the EXTCLK
pin and the CLKOUT is less than
±
1 ns.
The backup clock on-chip ring oscillator allows the MPC561/MPC563 to function with a less precise
clock. When operating from the backup clock, the MPC561/MPC563 is in limp mode. This enables the
system to continue minimum functionality until the system is fixed. The BUCLK frequency is
approximately 11 MHz for the MPC561/MPC563 (see
Appendix F, “Electrical Characteristics
for the
complete frequency range).
For normal operation, at least one clock source (EXTCLK or main system oscillator) must be active. A
configuration with both clock sources active is possible as well. At this configuration EXTCLK provides
the system clock and main system oscillator provides the PITRTCLK. The input of an unused timing
reference (EXTCLK or EXTAL) must be grounded.
Figure 8-2. Main System Oscillator Crystal Configuration
8.2
System PLL
The PLL allows the processor to operate at a high internal clock frequency using a low frequency clock
input, a feature which offers two benefits: reduces the overall electromagnetic interference generated by
the system, and the ability to oscillate at different frequencies reduces cost by eliminating the need to add
an additional oscillator to a system.
The PLL can perform the following functions:
•
Frequency multiplication
•
Skew elimination
•
Frequency division
EXTAL
XTAL
CL
CL
1 M
Ω
1
1. Resistor is not currently required on the board but space should be available for its addition in the future.
Summary of Contents for MPC561
Page 84: ...MPC561 MPC563 Reference Manual Rev 1 2 lxxxiv Freescale Semiconductor...
Page 144: ...Signal Descriptions MPC561 MPC563 Reference Manual Rev 1 2 2 46 Freescale Semiconductor...
Page 206: ...Central Processing Unit MPC561 MPC563 Reference Manual Rev 1 2 3 62 Freescale Semiconductor...
Page 302: ...Reset MPC561 MPC563 Reference Manual Rev 1 2 7 14 Freescale Semiconductor...
Page 854: ...Time Processor Unit 3 MPC561 MPC563 Reference Manual Rev 1 2 19 24 Freescale Semiconductor...
Page 968: ...Development Support MPC561 MPC563 Reference Manual Rev 1 2 23 54 Freescale Semiconductor...
Page 1144: ...Internal Memory Map MPC561 MPC563 Reference Manual Rev 1 2 B 34 Freescale Semiconductor...
Page 1212: ...TPU3 ROM Functions MPC561 MPC563 Reference Manual Rev 1 2 D 60 Freescale Semiconductor...
Page 1216: ...Memory Access Timing MPC561 MPC563 Reference Manual Rev 1 2 E 4 Freescale Semiconductor...
