Clocks and Power Control
MPC561/MPC563 Reference Manual, Rev. 1.2
8-16
Freescale Semiconductor
The switching from state three to state four is accomplished by clearing the
STBUC and LOCSS bits. If the switching is done when the PLL is not
locked, the system clock will not oscillate until lock condition is met.
The default value of the LME bit is determined by MODCK[1:3] during assertion of the PORESET line.
The configuration modes are shown in
.
8.7
Low-Power Modes
The LPM and other bits in the PLPRCR are encoded to provide one normal operating mode and four
low-power modes. In normal and doze modes the system can be in high state with frequency defined by
the DFNH bits, or in
the low state with frequency defined by the DFNL bits. The normal-high operating
mode is the state out of reset. This is also the state of the bits after the low-power mode exit signal arrives.
There are four low-power modes:
•
Doze mode
•
Sleep mode
•
Deep-sleep mode
•
Power-down mode
8.7.1
Entering a Low-Power Mode
Low-power modes are enabled by setting the MSR[POW] and clearing the SCCR[LPML]. Once enabled,
a low-power mode is entered by setting the LPM bits to the appropriate value. This can be done only in
one of the normal modes. The user cannot change the PLPRCR[LPM or CSRC] when the MCU is in doze
mode.
NOTE
Higher than desired currents during low-power mode can be avoided by
executing a mullw instruction before entering the low-power mode, i.e.,
anytime after reset and prior to entering the low-power mode.
Table 8-3. Status of Clock Source
STATE PORESET
HRESET
LME
LOCS
(status)
LOCSS
(sticky)
STBUC
BUCS
Chip
Clock
Source
1
0
0
1
0
0
0
1
BUCLK
2
1
0
1
0/1
0
0
1
BUCLK
3
1
1
At least one of the two bits, LOCSS or BUCS, must be asserted (one) in this state.
1
1
1
x
2
2
X = don’t care.
0/1
0/1
1
BUCLK
4
1
0
0/1
0
x
2
0
0
Oscillator
5
1
1
0/1
0
x
2
0
0
Oscillator
6
1
0
1
0/1
1
0/1
1
BUCLK
Summary of Contents for MPC561
Page 84: ...MPC561 MPC563 Reference Manual Rev 1 2 lxxxiv Freescale Semiconductor...
Page 144: ...Signal Descriptions MPC561 MPC563 Reference Manual Rev 1 2 2 46 Freescale Semiconductor...
Page 206: ...Central Processing Unit MPC561 MPC563 Reference Manual Rev 1 2 3 62 Freescale Semiconductor...
Page 302: ...Reset MPC561 MPC563 Reference Manual Rev 1 2 7 14 Freescale Semiconductor...
Page 854: ...Time Processor Unit 3 MPC561 MPC563 Reference Manual Rev 1 2 19 24 Freescale Semiconductor...
Page 968: ...Development Support MPC561 MPC563 Reference Manual Rev 1 2 23 54 Freescale Semiconductor...
Page 1144: ...Internal Memory Map MPC561 MPC563 Reference Manual Rev 1 2 B 34 Freescale Semiconductor...
Page 1212: ...TPU3 ROM Functions MPC561 MPC563 Reference Manual Rev 1 2 D 60 Freescale Semiconductor...
Page 1216: ...Memory Access Timing MPC561 MPC563 Reference Manual Rev 1 2 E 4 Freescale Semiconductor...