QADC64E Enhanced Mode Operation
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor
14-39
14.4.1
Queue Priority
Queue 1 has priority over queue 2 execution. The following cases show the conditions under which queue
1 asserts its priority:
•
When a queue is not active, a trigger event for queue 1 or queue 2 causes the corresponding queue
execution to begin.
•
When queue 1 is active and a trigger event occurs for queue 2, queue 2 cannot begin execution until
queue 1 reaches completion or the paused state. The status register records the trigger event by
reporting the queue 2 status as trigger pending. Additional trigger events for queue 2, which occur
before execution can begin, are captured as trigger overruns.
•
When queue 2 is active and a trigger event occurs for queue 1, the current queue 2 conversion is
aborted. The status register reports the queue 2 status as suspended. Any trigger events occurring
for queue 2 while queue 2 is suspended are captured as trigger overruns. Once queue 1 reaches the
completion or the paused state, queue 2 begins executing again. The programming of the RESUME
bit in QACR2 determines which CCW is executed in queue 2. Refer to
” for more information.
•
When simultaneous trigger events occur for queue 1 and queue 2, queue 1 begins execution and
the queue 2 status is changed to trigger pending.
14.4.2
Sub-Queues That are Paused
The pause feature can be used to divide queue 1 and/or queue 2 into multiple sub-queues. A sub-queue is
defined by setting the pause bit in the last CCW of the sub-queue.
shows the CCW format and an example of using pause to create sub-queues. Queue 1 is
shown with four CCWs in each sub-queue and queue 2 has two CCWs in each sub-queue.
Summary of Contents for MPC561
Page 84: ...MPC561 MPC563 Reference Manual Rev 1 2 lxxxiv Freescale Semiconductor...
Page 144: ...Signal Descriptions MPC561 MPC563 Reference Manual Rev 1 2 2 46 Freescale Semiconductor...
Page 206: ...Central Processing Unit MPC561 MPC563 Reference Manual Rev 1 2 3 62 Freescale Semiconductor...
Page 302: ...Reset MPC561 MPC563 Reference Manual Rev 1 2 7 14 Freescale Semiconductor...
Page 854: ...Time Processor Unit 3 MPC561 MPC563 Reference Manual Rev 1 2 19 24 Freescale Semiconductor...
Page 968: ...Development Support MPC561 MPC563 Reference Manual Rev 1 2 23 54 Freescale Semiconductor...
Page 1144: ...Internal Memory Map MPC561 MPC563 Reference Manual Rev 1 2 B 34 Freescale Semiconductor...
Page 1212: ...TPU3 ROM Functions MPC561 MPC563 Reference Manual Rev 1 2 D 60 Freescale Semiconductor...
Page 1216: ...Memory Access Timing MPC561 MPC563 Reference Manual Rev 1 2 E 4 Freescale Semiconductor...
