Queued Serial Multi-Channel Module
MPC561/MPC563 Reference Manual, Rev. 1.2
15-36
Freescale Semiconductor
15.6.5.3
Delay Before Transfer
The DSCK bit in each command RAM byte inserts either a standard (DSCK = 0) or user-specified (DSCK
= 1) delay from chip-select assertion until the leading edge of the serial clock. The DSCKL field in SPCR1
determines the length of the user-defined delay before the assertion of SCK. The following expression
determines the actual delay before SCK when DSCKL is in the range of 1–127:
Eqn. 15-3
NOTE
A zero value for DSCKL causes a delay of 128 IMB3 clocks, which equals
3.2 µs for a 40-MHz IMB3 clock. Because of design limits, a DSCKL value
of one defaults to the same timing as a value of two.
When DSCK equals zero, DSCKL is not used. Instead, the PCS valid-to-SCK transition is one-half the
SCK period.
15.6.5.4
Delay After Transfer
Delay after transfer can be used to provide a peripheral deselect interval. A delay can also be inserted
between consecutive transfers to allow serial A/D converters to complete conversion. Writing a value to
the DTL field in SPCR1 specifies a delay period. The DT bit in each command RAM byte determines
whether the standard delay period (DT = 0) or the specified delay period (DT = 1) is used. The following
expression is used to calculate the delay:
where DTL is in the range from one to 255.
A zero value for DTL causes a delay-after-transfer value of 8192
÷
IMB3 clock frequency
(204.8 µs with
a 40-MHz IMB3 clock).
If DT is zero in a command RAM byte, a standard delay is inserted.
14
7
2.86 MHz
28
14
1.43 MHz
58
29
689 kHz
280
140
143 kHz
510
255
78.43 kHz
Table 15-21. Example SCK Frequencies with a 40-MHz IMB3 Clock (continued)
Division Ratio
SPBR Value
SCK
Frequency
PCS to SCK Delay
DSCKL
f
SYS
--------------------
=
Delay after Transfer
32xDTL
f
SYS
---------------------
=
Standard Delay after Transfer
17
f
SYS
-------------
=
Summary of Contents for MPC561
Page 84: ...MPC561 MPC563 Reference Manual Rev 1 2 lxxxiv Freescale Semiconductor...
Page 144: ...Signal Descriptions MPC561 MPC563 Reference Manual Rev 1 2 2 46 Freescale Semiconductor...
Page 206: ...Central Processing Unit MPC561 MPC563 Reference Manual Rev 1 2 3 62 Freescale Semiconductor...
Page 302: ...Reset MPC561 MPC563 Reference Manual Rev 1 2 7 14 Freescale Semiconductor...
Page 854: ...Time Processor Unit 3 MPC561 MPC563 Reference Manual Rev 1 2 19 24 Freescale Semiconductor...
Page 968: ...Development Support MPC561 MPC563 Reference Manual Rev 1 2 23 54 Freescale Semiconductor...
Page 1144: ...Internal Memory Map MPC561 MPC563 Reference Manual Rev 1 2 B 34 Freescale Semiconductor...
Page 1212: ...TPU3 ROM Functions MPC561 MPC563 Reference Manual Rev 1 2 D 60 Freescale Semiconductor...
Page 1216: ...Memory Access Timing MPC561 MPC563 Reference Manual Rev 1 2 E 4 Freescale Semiconductor...
