CAN 2.0B Controller Module
MPC561/MPC563 Reference Manual, Rev. 1.2
16-32
Freescale Semiconductor
16.7.10 Receive Buffer 14 Mask Registers (RX14MSKHI, RX14MSKLO)
The receive buffer 14 mask registers have the same structure as the receive global mask registers and are
used to mask buffer 14.
Table 16-20. RXGMSKHI, RXGMSKLO Bit Descriptions
Bits
Name
Description
0:31
MID
x
The receive global mask registers use four bytes. The mask bits are applied to all
receive-identifiers, excluding receive-buffers 14 and 15, which have their own specific mask
registers.
Base ID mask bits MID[28:18] are used to mask standard or extended format frames.
Extended ID bits MID[17:0] are used to mask only extended format frames.
The RTR/SRR bit of a received frame is never compared to the corresponding bit in the
message buffer ID field. However, remote request frames (RTR = 1) once received, are never
stored into the message buffers. RTR mask bit locations in the mask registers (bits 11 and
31) are always zero, regardless of any write to these bits.
The IDE bit of a received frame is always compared to determine if the message contains a
standard or extended identifier. Its location in the mask registers (bit 12) is always one,
regardless of any write to this bit.
MSB
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Field MID2
8
MID2
7
MID2
6
MID2
5
MID2
4
MID2
3
MID2
2
MID2
1
MID2
0
MID1
9
MID1
8
0
1
MID
17
MID
16
MID
15
SRESET
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
Addr
0x30 7094 (Rx14MSKHI_A); 0x30 7494 (Rx14MSKHI_B); 0x30 7894 (Rx14MSKHI_C);
0x30 7096 (Rx14MSKLO_A); 0x30 7496 (Rx14MSKLO_B); 0x30 7896 (Rx14MSKLO_C)
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
LSB
31
Field MID1
4
MID1
3
MID1
2
MID1
1
MID1
0
MID9 MID8 MID7 MID6 MID5 MID4 MID3 MID2 MID
1
MID
0
0
SRESET
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
Figure 16-17. Receive Buffer 14 Mask Registers: High (RX14MSKHI), Low (RX14MSKLO)
Table 16-21. RX14MSKHI, RX14MSKLO Field Descriptions
Bits
Name
Description
0:31
MID
x
The receive buffer 14 mask registers use 4 bytes.
Base ID mask bits MID[28:18] are used to mask standard or extended format frames.
Extended ID bits MID[17:0] are used to mask only extended format frames.
The RTR/SRR bit of a received frame is never compared to the corresponding bit in the
message buffer ID field. However, remote request frames (RTR = 1) once received, are never
stored into the message buffers. RTR mask bit locations in the mask registers (bits 11 and
31) are always zero, regardless of any write to these bits.
The IDE bit of a received frame is always compared to determine if the message contains a
standard or extended identifier. Its location in the mask registers (bit 12) is always one,
regardless of any write to this bit.
Summary of Contents for MPC561
Page 84: ...MPC561 MPC563 Reference Manual Rev 1 2 lxxxiv Freescale Semiconductor...
Page 144: ...Signal Descriptions MPC561 MPC563 Reference Manual Rev 1 2 2 46 Freescale Semiconductor...
Page 206: ...Central Processing Unit MPC561 MPC563 Reference Manual Rev 1 2 3 62 Freescale Semiconductor...
Page 302: ...Reset MPC561 MPC563 Reference Manual Rev 1 2 7 14 Freescale Semiconductor...
Page 854: ...Time Processor Unit 3 MPC561 MPC563 Reference Manual Rev 1 2 19 24 Freescale Semiconductor...
Page 968: ...Development Support MPC561 MPC563 Reference Manual Rev 1 2 23 54 Freescale Semiconductor...
Page 1144: ...Internal Memory Map MPC561 MPC563 Reference Manual Rev 1 2 B 34 Freescale Semiconductor...
Page 1212: ...TPU3 ROM Functions MPC561 MPC563 Reference Manual Rev 1 2 D 60 Freescale Semiconductor...
Page 1216: ...Memory Access Timing MPC561 MPC563 Reference Manual Rev 1 2 E 4 Freescale Semiconductor...
