MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
Freescale Semiconductor
31
UCC Ethernet Controller: Three-Speed Ethernet, MII Management
Figure 11
shows the GMII receive AC timing diagram.
Figure 11. GMII Receive AC Timing Diagram
8.2.2
MII AC Timing Specifications
This section describes the MII transmit and receive AC timing specifications.
8.2.2.1
MII Transmit AC Timing Specifications
Table 29
provides the MII transmit AC timing specifications.
RX_CLK clock fall time, (80% to 20%)
t
GRXF
—
—
1.0
ns
—
Notes:
1. The symbols used for timing specifications follow the pattern of t
(first two letters of functional block)(signal)(state)(reference)(state)
for
inputs and t
(first two letters of functional block)(reference)(state)(signal)(state)
for outputs. For example, t
GRDVKH
symbolizes GMII receive
timing (GR) with respect to the time data input signals (D) reaching the valid state (V) relative to the t
RX
clock reference (K)
going to the high state (H) or setup time. Also, t
GRDXKL
symbolizes GMII receive timing (GR) with respect to the time data
input signals (D) went invalid (X) relative to the t
GRX
clock reference (K) going to the low (L) state or hold time. Note that, in
general, the clock reference symbol representation is based on three letters representing the clock of a particular functional.
For example, the subscript of t
GRX
represents the GMII (G) receive (RX) clock. For rise and fall times, the latter convention
is used with the appropriate letter: R (rise) or F (fall).
2. In rev. 2.0 silicon, due to errata, t
GRDXKH
minimum is 0.5 which is not compliant with the standard. Refer to Errata
QE_ENET18 in Chip Errata for the MPC8360E, Rev. 1.
Table 29. MII Transmit AC Timing Specifications
At recommended operating conditions with LV
DD
/OV
DD
of 3.3 V ± 10%.
Parameter/Condition
Symbol
1
Min
Typ
Max
Unit
TX_CLK clock period 10 Mbps
t
MTX
—
400
—
ns
TX_CLK clock period 100 Mbps
t
MTX
—
40
—
ns
TX_CLK duty cycle
t
MTXH
/t
MTX
35
—
65
%
TX_CLK to MII data TXD[3:0], TX_ER, TX_EN delay
t
MTKHDX
t
MTKHDV
1
—
5
—
15
ns
Table 28. GMII Receive AC Timing Specifications (continued)
At recommended operating conditions with LV
DD
/OV
DD
of 3.3 V ± 10%.
Parameter/Condition
Symbol
1
Min
Typ
Max
Unit
Notes
RX_CLK
RXD[7:0]
t
GRDXKH
t
GRX
t
GRXH
t
GRXR
t
GRXF
t
GRDVKH
RX_DV
RX_ER