MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
Freescale Semiconductor
59
SPI
16.1
SPI DC Electrical Characteristics
Table 55
provides the DC electrical characteristics for the device SPI.
16.2
SPI AC Timing Specifications
Table 56
and provide the SPI input and output AC timing specifications.
Figure 41
provides the AC test load for the SPI.
Figure 41. SPI AC Test Load
Table 55. SPI DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Output high voltage
V
OH
I
OH
= –6.0 mA
2.4
—
V
Output low voltage
V
OL
I
OL
= 6.0 mA
—
0.5
V
Output low voltage
V
OL
I
OL
= 3.2 mA
—
0.4
V
Input high voltage
V
IH
—
2.0
OV
DD
+ 0.3
V
Input low voltage
V
IL
—
–0.3
0.8
V
Input current
I
IN
0 V
≤
V
IN
≤
OV
DD
—
±10
μ
A
Table 56. SPI AC Timing Specifications
1
Characteristic Symbol
2
Min
Max
Unit
SPI outputs—Master mode (internal clock) delay
t
NIKHOX
t
NIKHOV
0.3
—
—
8
ns
SPI outputs—Slave mode (external clock) delay
t
NEKHOX
t
NEKHOV
2
—
—
8
ns
SPI inputs—Master mode (internal clock) input setup time
t
NIIVKH
8
—
ns
SPI inputs—Master mode (internal clock) input hold time
t
NIIXKH
0
—
ns
SPI inputs—Slave mode (external clock) input setup time
t
NEIVKH
4
—
ns
SPI inputs—Slave mode (external clock) input hold time
t
NEIXKH
2
—
ns
Notes:
1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings
are measured at the pin.
2. The symbols used for timing specifications follow the pattern of t
(first two letters of functional block)(signal)(state)(reference)(state)
for
inputs and t
(first two letters of functional block)(reference)(state)(signal)(state)
for outputs. For example, t
NIKHOV
symbolizes the NMSI
outputs internal timing (NI) for the time t
SPI
memory clock reference (K) goes from the high state (H) until outputs (O) are
valid (V).
Output
Z
0
= 50
Ω
OV
DD
/2
R
L
= 50
Ω