Reset Programming Model
MSC8144E Reference Manual, Rev. 3
Freescale Semiconductor
5-25
5.3.6 Reset Control Enable Register (RCER)
The reset control enable register shown in indicates by the CRE field that the reset protection
register (RPR) was accessed with a value that enables the reset control register (RCR). Table
5-14 defines the RCER bit fields.
RCER
Reset Control Enable Register
Offset 0x20
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
—
Type
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
—
CRE
Type
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 5-14. RCER Bit Descriptions
Name
Reset
Description
Settings
—
31–1
0
Reserved. Write to zero for future compatibility.
CRE
0
0
Control Register Enabled
Indicates the status of the reset control register
(RCR). Writing 1 to this bit disables the RCR
and clears this bit. Writing zero has no effect.
0
RCR is disabled.
1
The enable value is written to the reset
protection register (RPR) to enable the RCR.
Summary of Contents for MSC8144E
Page 1: ...MSC8144E Reference Manual Quad Core Media Signal Processor MSC8144ERM Rev 3 July 2009 ...
Page 48: ...MSC8144E Reference Manual Rev 3 xlviii Freescale Semiconductor ...
Page 86: ...MSC8144E Reference Manual Rev 3 1 38 Freescale Semiconductor Overview ...
Page 168: ...MSC8144E Reference Manual Rev 3 3 60 Freescale Semiconductor External Signals ...
Page 242: ...MSC8144E Reference Manual Rev 3 5 26 Freescale Semiconductor Reset ...
Page 314: ...MSC8144E Reference Manual Rev 3 8 24 Freescale Semiconductor General Configuration Registers ...
Page 414: ...MSC8144E Reference Manual Rev 3 10 14 Freescale Semiconductor MSC8144E SC3400 DSP Subsystem ...
Page 452: ...MSC8144E Reference Manual Rev 3 11 38 Freescale Semiconductor Internal Memory Subsystem ...
Page 520: ...MSC8144E Reference Manual Rev 3 12 68 Freescale Semiconductor DDR SDRAM Memory Controller ...
Page 1070: ...MSC8144E Reference Manual Rev 3 21 28 Freescale Semiconductor Timers ...