MSC8144E Reference Manual, Rev. 3
16-22
Freescale
Semiconductor
Serial RapidIO
®
Controller
If a request hits (base address match) multiple ATMU windows and the transaction end address is
contained within the boundary of each hit window and does not extend into another ATMU
window, the translation window is the highest-priority window.
If a lower-priority window is programmed to lie entirely within a higher-priority window, then it
is possible for a transaction to cross window boundaries. Although this is not a practical
programming application, RapidIO Endpoint handles it as follows:
If a request hits (base address match) an ATMU window (1–4) and the transaction end
address extends into another ATMU window with a lower priority but contained within
the boundary of the hit window, the translation window is the hit window.
If a request hits (base address match) multiple ATMU windows (1–4) and the transaction
end address extends beyond the boundary of a lower-priority hit window but is still
contained within the boundary of a higher-priority hit window, the translation window is
the highest priority window.
16.2.5.4.2 Window Boundary Crossing Errors
If a higher-priority window is programmed to lie entirely within a lower-priority window, then it
is possible for a transaction to cross window boundaries. The RapidIO endpoint handles this
situation as follows:
If a request hits (base address match) an ATMU window (1–4, default) and the transaction
end address extends into another ATMU window with a higher priority, an ATMU
crossed boundary error is generated and logged.
If a request hits multiple ATMU windows (1–4, default) and the transaction end address
extends beyond the boundary of a higher priority hit window, an inbound ATMU crossed
boundary error is generated and logged.
Other window boundary crossing errors are as follows:
If a request hits (base address match) an ATMU window (1–4) and the transaction end
address exceeds the size of the window, an inbound ATMU crossed boundary error is
generated and logged.
If a NREAD/NWRITE_R/NWRITE/SWRITE request hits (base address match) an
ATMU window (1–4, default) and the transaction end address extends into the region
defined as the local configuration space window, an inbound ATMU crossed boundary
error is generated and logged.
A RapidIO error response is generated for RapidIO requests that require a response. RapidIO
requests that do not require a response are dropped. Inbound ATMU boundary crossing errors are
logged in the LTLEDCSR[IACB] configuration register. If a request misses all ATMU windows
(1–4) and the transaction end address exceeds the maximum size of the default window, an
inbound ATMU crossed boundary error is not generated.
Summary of Contents for MSC8144E
Page 1: ...MSC8144E Reference Manual Quad Core Media Signal Processor MSC8144ERM Rev 3 July 2009 ...
Page 48: ...MSC8144E Reference Manual Rev 3 xlviii Freescale Semiconductor ...
Page 86: ...MSC8144E Reference Manual Rev 3 1 38 Freescale Semiconductor Overview ...
Page 168: ...MSC8144E Reference Manual Rev 3 3 60 Freescale Semiconductor External Signals ...
Page 242: ...MSC8144E Reference Manual Rev 3 5 26 Freescale Semiconductor Reset ...
Page 314: ...MSC8144E Reference Manual Rev 3 8 24 Freescale Semiconductor General Configuration Registers ...
Page 414: ...MSC8144E Reference Manual Rev 3 10 14 Freescale Semiconductor MSC8144E SC3400 DSP Subsystem ...
Page 452: ...MSC8144E Reference Manual Rev 3 11 38 Freescale Semiconductor Internal Memory Subsystem ...
Page 520: ...MSC8144E Reference Manual Rev 3 12 68 Freescale Semiconductor DDR SDRAM Memory Controller ...
Page 1070: ...MSC8144E Reference Manual Rev 3 21 28 Freescale Semiconductor Timers ...
