External Bus Interface (EBI)
Freescale Semiconductor
30-3
PXR40 Microcontroller Reference Manual, Rev. 1
available for use in an alternate function by another block of the MCU. Single Master Mode is entered
when EXTM=0 and MDIS=0 in the EBI_MCR.
30.1.4.2
Module Disable Mode
The Module Disable Mode is used for MCU power management. The clock to the non-memory mapped
logic in the EBI can be stopped while in Module Disable Mode. Logic on the MCU external to the EBI is
needed to fully implement the Module Disable Mode (to shut off the clock). Internal master requests made
to the external bus in Module Disable Mode are terminated with transfer error (internally, no external
D_TEA assertion). Module Disable Mode is entered when MDIS=1 in the EBI_MCR.
30.1.4.3
Stop Mode
The EBI supports the SIU Halt Mode mechanism used for MCU power management. When a request is
made to enter Stop Mode (controlled in device logic outside EBI), the EBI block completes any pending
bus transactions and acknowledges the stop request. After the acknowledgement, the system clock input
may be shut off by the clock driver on the MCU. While the clocks are shut off, the EBI is not accessible.
While in stop mode, accesses to the EBI from the internal master will terminate with transfer error
(internally, no external D_TEA assertion).
30.1.4.4
Slower-Speed Modes
In slower-speed modes, the external D_CLKOUT frequency is divided (by 2, 3, etc.) compared with that
of the internal system bus. The EBI behavior remains dictated by the mode of the EBI, except that it drives
and samples signals at the D_CLKOUT frequency rather than the internal system frequency. This mode is
selected by writing a clock control register in a block outside of the EBI.
30.1.4.5
16-Bit Data Bus Mode
For MCUs that have only 16 data bus signals pinned out, or for systems where the use of a different
multiplexed function (e.g. GPIO) is desired on 16 of the 32 data pins, the EBI supports a 16-bit Data Bus
Mode. In this mode, only 16 data signals are used by the EBI. The user can select which 16 data signals
are used (D_ADD_DAT[0:15] or D_ADD_DAT[16:31]) by writing the D16_31 bit in the EBI_MCR.
For EBI-mastered accesses, the operation in 16-bit Data Bus Mode (DBM=1, PS=x) is similar to a
chip-select access to a 16-bit port in 32-bit Data Bus Mode (DBM=0, PS=1), except for the case of a
non-chip-select access of exactly 32-bit size.
EBI-mastered non-chip-select accesses of exactly 32-bit size are supported via a two (16-bit) beat burst
for both reads and writes. See
Section 30.4.2.9, Non-Chip-Select Burst in 16-bit Data Bus Mode
.
Non-chip-select transfers of non-32-bit size are supported in standard non-burst fashion.
16-bit Data Bus Mode is entered when DBM=1 in the EBI_MCR.
Summary of Contents for PXR4030
Page 1: ...PXR40 Microcontroller Reference Manual Devices Supported PXR4030 PXR4040 PXR40RM Rev 1 06 2011...
Page 30: ...PXR40 Microcontroller Reference Manual Rev 1 Freescale Semiconductor xxx...
Page 40: ...PXR40 Microcontroller Reference Manual Rev 1 xl Freescale Semiconductor...
Page 66: ...Memory Map PXR40 Microcontroller Reference Manual Rev 1 2 4 Freescale Semiconductor...
Page 120: ...Signal Descriptions 3 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
Page 860: ...FlexCAN Module 24 50 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
Page 1167: ...Decimation Filter Freescale Semiconductor 28 53 PXR40 Microcontroller Reference Manual Rev 1...
Page 1168: ...Decimation Filter 28 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
