Nexus Development Interface (NDI)
Freescale Semiconductor
31-27
PXR40 Microcontroller Reference Manual, Rev. 1
31.7.2.8
Nexus Reset Control
The JCOMP input that is used as the primary reset signal for the NPC is also used by the NPC to generate
a single-bit reset signal for other Nexus modules. If JCOMP is negated, an internal reset signal is asserted,
indicating that all Nexus modules must be held in reset. This internal reset signal is also asserted during a
power-on reset. This single bit reset signal functions much like the IEEE 1149.1-2001 defined TRST signal
and allows JCOMP reset information to be provided to the Nexus modules without each module having to
sense the JCOMP signal directly.
31.8
NPC Initialization and Application Information
31.8.1
Accessing NPC Tool-Mapped Registers
To initialize the TAP for NPC register accesses, the following sequence is required:
1. Enable the NPC TAP controller. This is achieved by asserting JCOMP and loading the
ACCESS_AUX_TAP_NPC instruction in the JTAGC.
2. Load the TAP controller with the NEXUS-ENABLE instruction.
To write control data to NPC tool-mapped registers, the following sequence is required:
1. Write the 7-bit register index and set the write bit to select the register with a pass through the
SELECT-DR-SCAN path in the TAP controller state machine.
2. Write the register value with a second pass through the SELECT-DR-SCAN path. The prior value
of this register is shifted out during the write.
To read status and control data from NPC tool-mapped registers, the following sequence is required:
1. Write the 7-bit register index and clear the write bit to select register with a pass through
SELECT-DR-SCAN path in the TAP controller state machine.
2. Read the register value with a second pass through the SELECT-DR-SCAN path. Data shifted in
is ignored.
See the IEEE-ISTO 5001-2011 standard for more detail.
31.9
Nexus Dual eTPU Development Interface (NDEDI)
The enhanced timing processor unit (eTPU) has its own Nexus class 3 interface, the Nexus dual eTPU
development interface (NDEDI). The two eTPU engines and a coherent dual parameter controller (CDC)
appear as three separate Nexus clients. See the
Enhanced Time Processor Unit Reference Manual
for more
information about the NDEDI module.
Summary of Contents for PXR4030
Page 1: ...PXR40 Microcontroller Reference Manual Devices Supported PXR4030 PXR4040 PXR40RM Rev 1 06 2011...
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Page 120: ...Signal Descriptions 3 54 Freescale Semiconductor PXR40 Microcontroller Reference Manual Rev 1...
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Page 1167: ...Decimation Filter Freescale Semiconductor 28 53 PXR40 Microcontroller Reference Manual Rev 1...
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