Frequency Modulated Phase-Locked Loop (FMPLL)
6-6
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
27
LOCKS
Sticky PLL Lock Status Bit. The LOCKS bit is a sticky indication of PLL lock status. LOCKS is set by the lock
detect circuitry when the PLL acquires lock after: 1) a system reset, or 2) a write to the ESYNCR1 which modifies
the ESYNCR1[EMFD] bits, or 3) frequency modulation is enabled. Whenever the PLL loses lock, LOCKS is
cleared. LOCKS remains cleared after the PLL re-locks, until one of the three conditions occurs. Furthermore,
if the LOCKS bit is read when the PLL simultaneously loses lock, the bit does not reflect the current loss-of-lock
condition.
If operating in PLL Off mode, LOCKS remains cleared after reset.
0 PLL has lost lock since last system reset, a write to ESYNCR1 to modify the ESYNCR1[EMFD] and
ESYNCR1[EPREDIV] bit fields, or frequency modulation enabled
1 PLL has not lost lock since last system reset, a write to ESYNCR1 to modify the ESYNCR1[EMFD] and
ESYNCR1[EPREDIV] bit fields, or frequency modulation enabled
28
LOCK
PLL Lock Status Bit. The LOCK bit indicates whether the PLL has acquired lock. Refer to PXR40 Microcontroller
Data Sheet for tolerances. If the LOCK bit is read when the PLL simultaneously loses lock or acquires lock, the
bit does not reflect the current condition of the PLL.
If operating in PLL Off mode, LOCK remains cleared after reset.
0 PLL is unlocked
1 PLL is locked
29
LOCF
Loss-of-Clock Flag. This bit provides the interrupt request flag. To clear the flag, write a 1 to the bit. Writing 0
has no effect. Asserting reset clears the flag. If clocks return to normal after the flag has been set, the bit remains
set until cleared by either writing 1 or asserting reset. A loss-of-clock condition can only be detected if
LOCEN = 1.
0 Interrupt service not requested.
1 Interrupt service requested.
30–31
Reserved
Table 6-2. SYNSR Bit Field Descriptions (continued)
Field
Description
Summary of Contents for PXR4030
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